| commit | author | age | ||
| 7d0d56 | 1 | diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile |
| W | 2 | index 7b1a129e6..1d5c6e770 100644 |
| 3 | --- a/arch/arm64/boot/dts/freescale/Makefile | |
| 4 | +++ b/arch/arm64/boot/dts/freescale/Makefile | |
| 5 | @@ -412,3 +412,5 @@ dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb \ | |
| 6 | s32v234-sbc.dtb | |
| 7 | dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek-sof-cs42888.dtb imx8qm-mek-sof-wm8960.dtb \ | |
| 8 | imx8qm-mek-revd-sof-wm8962.dtb imx8qm-mek-sof.dtb | |
| 9 | + | |
| 10 | +dtb-$(CONFIG_ARCH_MXC) += igkboard-imx8mp.dtb | |
| 11 | diff --git a/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts b/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts | |
| 12 | new file mode 100644 | |
| 2b23f8 | 13 | index 000000000..b0c36a3c0 |
| 7d0d56 | 14 | --- /dev/null |
| W | 15 | +++ b/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts |
| 2b23f8 | 16 | @@ -0,0 +1,690 @@ |
| 7d0d56 | 17 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 6f4428 | 18 | +/* |
| G | 19 | + * Device Tree Source for LingYun IGKBoard(IoT Gateway Kits Board) - imx8mp |
| 7d0d56 | 20 | + * Copyright 2023 LingYun IoT System Studio. |
| W | 21 | + */ |
| 22 | + | |
| 23 | +/dts-v1/; | |
| 24 | + | |
| 25 | +#include <dt-bindings/usb/pd.h> | |
| 26 | +#include "imx8mp.dtsi" | |
| 27 | + | |
| 28 | +/*+------------------------+ | |
| 29 | + | root node | | |
| 30 | + +------------------------+*/ | |
| 31 | +/ { | |
| 32 | + model = "LingYun IoT Gateway Kits Board based on i.MX8MP"; | |
| 33 | + compatible = "lingyun,igkboard-imx8mp", "fsl,imx8mp"; | |
| 34 | + | |
| 6f4428 | 35 | + /* console */ |
| 7d0d56 | 36 | + chosen { |
| W | 37 | + stdout-path = &uart2; |
| 38 | + }; | |
| 39 | + | |
| 40 | + /* MT53D512M32D2DS-053 WT:D, 2GB LPDDR4 */ | |
| 41 | + memory@80000000 { | |
| 42 | + device_type = "memory"; | |
| 6f4428 | 43 | + reg = <0x0 0x80000000 0 0x40000000>; |
| 7d0d56 | 44 | + }; |
| W | 45 | + |
| 46 | + leds { | |
| 47 | + compatible = "gpio-leds"; | |
| 48 | + pinctrl-names = "default"; | |
| 49 | + pinctrl-0 = <&pinctrl_leds>; | |
| 50 | + status = "okay"; | |
| 51 | + | |
| 52 | + sysled { | |
| 53 | + label = "sysled"; | |
| 54 | + gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; | |
| 7872ca | 55 | + default-state = "on"; |
| G | 56 | + linux,default-trigger = "heartbeat"; |
| 57 | + }; | |
| 58 | + | |
| 59 | + ledred { | |
| 60 | + label = "redled"; | |
| 61 | + gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; | |
| 62 | + default-state = "off"; | |
| 63 | + }; | |
| 64 | + | |
| 65 | + ledgreen { | |
| 66 | + label = "greenled"; | |
| 67 | + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; | |
| 68 | + default-state = "off"; | |
| 69 | + }; | |
| 70 | + | |
| 71 | + ledblue { | |
| 72 | + label = "blueled"; | |
| 73 | + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; | |
| 74 | + default-state = "on"; | |
| f77a70 | 75 | + linux,default-trigger = "timer"; |
| 7872ca | 76 | + }; |
| G | 77 | + }; |
| 78 | + | |
| 79 | + keys { | |
| 80 | + compatible = "gpio-keys"; | |
| 81 | + pinctrl-names = "default"; | |
| 82 | + pinctrl-0 = <&pinctrl_keys>; | |
| 83 | + status = "okay"; | |
| 84 | + | |
| 85 | + key1 { | |
| 86 | + label = "K1"; | |
| 87 | + gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; | |
| 88 | + linux,code = <BTN_1>; | |
| 89 | + }; | |
| 90 | + | |
| 91 | + key2 { | |
| 92 | + label = "K2"; | |
| 93 | + gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; | |
| 94 | + linux,code = <BTN_2>; | |
| 95 | + }; | |
| 96 | + | |
| 97 | + key3 { | |
| 98 | + label = "K3"; | |
| 99 | + gpios = <&gpio5 26 GPIO_ACTIVE_LOW>; | |
| 100 | + linux,code = <BTN_3>; | |
| 101 | + }; | |
| 102 | + | |
| 103 | + key4 { | |
| 104 | + label = "K4"; | |
| 105 | + gpios = <&gpio5 27 GPIO_ACTIVE_LOW>; | |
| 106 | + linux,code = <BTN_4>; | |
| 7d0d56 | 107 | + }; |
| W | 108 | + }; |
| 109 | +}; | |
| 110 | + | |
| 111 | +/*+------------------------+ | |
| 112 | + | power key & reset | | |
| 113 | + +------------------------+*/ | |
| 114 | + | |
| 115 | +&snvs_pwrkey { | |
| 116 | + status = "okay"; | |
| 117 | +}; | |
| 118 | + | |
| 119 | +&wdog1 { | |
| 120 | + pinctrl-names = "default"; | |
| 121 | + pinctrl-0 = <&pinctrl_wdog>; | |
| 122 | + fsl,ext-reset-output; | |
| 123 | + status = "okay"; | |
| 124 | +}; | |
| 125 | + | |
| 126 | +/*+------------------------+ | |
| 127 | + | console usart2 | | |
| 128 | + +------------------------+*/ | |
| 129 | +&uart2 { | |
| 130 | + pinctrl-names = "default"; | |
| 131 | + pinctrl-0 = <&pinctrl_uart2>; | |
| 132 | + status = "okay"; | |
| 133 | +}; | |
| 134 | + | |
| 135 | +/*+------------------------+ | |
| 136 | + | 8GB eMMC on SD3 | | |
| 137 | + +------------------------+*/ | |
| 138 | + | |
| 139 | +/* KLM8G1GETF-B041 8GB eMMC */ | |
| 140 | +&usdhc3 { | |
| 141 | + pinctrl-names = "default", "state_100mhz", "state_200mhz"; | |
| 142 | + pinctrl-0 = <&pinctrl_usdhc3>; | |
| 143 | + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; | |
| 144 | + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; | |
| 145 | + bus-width = <8>; | |
| 146 | + non-removable; | |
| 147 | + status = "okay"; | |
| 148 | +}; | |
| 149 | + | |
| 150 | +/*+------------------------+ | |
| 151 | + | TF Card on SD2 | | |
| 152 | + +------------------------+*/ | |
| 153 | + | |
| 154 | +&usdhc2 { | |
| 155 | + pinctrl-names = "default", "state_100mhz", "state_200mhz"; | |
| 156 | + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; | |
| 157 | + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; | |
| 158 | + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; | |
| 159 | + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; | |
| 160 | + bus-width = <4>; | |
| 161 | + no-1-8-v; | |
| 162 | + status = "okay"; | |
| 163 | +}; | |
| 164 | + | |
| 165 | +/*+------------------------+ | |
| 166 | + | Typec USB for download | | |
| 167 | + +------------------------+*/ | |
| 168 | + | |
| 169 | +&usb3_phy0 { | |
| 170 | + fsl,phy-tx-vref-tune = <6>; | |
| 171 | + fsl,phy-tx-rise-tune = <0>; | |
| 172 | + fsl,phy-tx-preemp-amp-tune = <3>; | |
| 173 | + fsl,phy-comp-dis-tune = <7>; | |
| 174 | + fsl,pcs-tx-deemph-3p5db = <0x21>; | |
| 175 | + fsl,phy-pcs-tx-swing-full = <0x7f>; | |
| 176 | + status = "okay"; | |
| 177 | +}; | |
| 178 | + | |
| 179 | +&usb3_0 { | |
| 180 | + status = "okay"; | |
| 181 | +}; | |
| 182 | + | |
| 183 | +&usb_dwc3_0 { | |
| 184 | + dr_mode = "peripheral"; | |
| 185 | + hnp-disable; | |
| 186 | + srp-disable; | |
| 187 | + adp-disable; | |
| 188 | + status = "okay"; | |
| 189 | +}; | |
| 190 | + | |
| 191 | +/*+------------------------+ | |
| 192 | + | 2xUSB Host on USB Hub | | |
| 193 | + +------------------------+*/ | |
| 194 | + | |
| 195 | +/* Renesas USB 3.0 Hub uPD720210 */ | |
| 196 | +&usb3_phy1 { | |
| 197 | + fsl,phy-tx-preemp-amp-tune = <2>; | |
| 198 | + status = "okay"; | |
| 199 | +}; | |
| 200 | + | |
| 201 | +&usb3_1 { | |
| 202 | + status = "okay"; | |
| 203 | +}; | |
| 204 | + | |
| 205 | +&usb_dwc3_1 { | |
| 206 | + dr_mode = "host"; | |
| 207 | + status = "okay"; | |
| 208 | +}; | |
| 209 | + | |
| 210 | +/*+------------------------+ | |
| 211 | + | Ethernet | | |
| 212 | + +------------------------+*/ | |
| 213 | + | |
| 214 | +/* First 1000Mbps Ethernet For TSN on ENET */ | |
| 215 | +&eqos { | |
| 216 | + pinctrl-names = "default"; | |
| 217 | + pinctrl-0 = <&pinctrl_eqos>; | |
| 218 | + phy-mode = "rgmii-id"; | |
| 219 | + phy-handle = <ðphy0>; | |
| 220 | + status = "okay"; | |
| 221 | + | |
| 222 | + mdio { | |
| 223 | + compatible = "snps,dwmac-mdio"; | |
| 224 | + #address-cells = <1>; | |
| 225 | + #size-cells = <0>; | |
| 6f4428 | 226 | + clock-frequency = <5000000>; |
| 7d0d56 | 227 | + |
| W | 228 | + ethphy0: ethernet-phy@0 { /* YT8521SH-CA */ |
| 229 | + compatible = "ethernet-phy-ieee802.3-c22"; | |
| 230 | + reg = <0>; | |
| 231 | + eee-broken-1000t; | |
| 232 | + }; | |
| 233 | + }; | |
| 234 | +}; | |
| 235 | + | |
| 6f4428 | 236 | +/* Second 1000Mbps Ethernet on ENET1, test okay */ |
| 7d0d56 | 237 | +&fec { |
| W | 238 | + pinctrl-names = "default"; |
| 239 | + pinctrl-0 = <&pinctrl_fec>; | |
| 240 | + phy-mode = "rgmii-id"; | |
| 241 | + phy-handle = <ðphy1>; | |
| 242 | + fsl,magic-packet; | |
| 243 | + status = "okay"; | |
| 244 | + | |
| 245 | + mdio { | |
| 246 | + #address-cells = <1>; | |
| 247 | + #size-cells = <0>; | |
| 6f4428 | 248 | + clock-frequency = <5000000>; |
| 7d0d56 | 249 | + |
| W | 250 | + ethphy1: ethernet-phy@0 { /* YT8521SH-CA */ |
| 251 | + compatible = "ethernet-phy-ieee802.3-c22"; | |
| 252 | + reg = <0>; | |
| 253 | + eee-broken-1000t; | |
| 254 | + }; | |
| 255 | + }; | |
| 256 | +}; | |
| 257 | + | |
| 258 | +/*+------------------------+ | |
| 500850 | 259 | + | Misc Devices | |
| G | 260 | + +------------------------+*/ |
| 261 | + | |
| 262 | +/* Buzzer */ | |
| 263 | +&pwm1 { | |
| 264 | + pinctrl-names = "default"; | |
| 265 | + pinctrl-0 = <&pinctrl_pwm1>; | |
| 266 | + status = "okay"; | |
| 267 | +}; | |
| 268 | + | |
| 2b23f8 | 269 | +&i2c2 { |
| G | 270 | + clock-frequency = <100000>; |
| 271 | + pinctrl-names = "default"; | |
| 272 | + pinctrl-0 = <&pinctrl_i2c2>; | |
| 273 | + status = "okay"; | |
| 274 | + | |
| 275 | + rtc1208@6f { | |
| 276 | + compatible = "isil,isl1208"; | |
| 277 | + reg = <0x6f>; | |
| 278 | + status = "okay"; | |
| 279 | + }; | |
| 280 | +}; | |
| 281 | + | |
| 500850 | 282 | +/*+------------------------+ |
| ac4b9f | 283 | + | CAN/RS485 interface | |
| G | 284 | + +------------------------+*/ |
| 285 | +/* RS485 */ | |
| 286 | +&uart3 { | |
| 287 | + pinctrl-names = "default"; | |
| 288 | + pinctrl-0 = <&pinctrl_uart3>; | |
| 289 | + status = "okay"; | |
| 290 | +}; | |
| 291 | + | |
| 292 | +/* CAN */ | |
| 293 | +&flexcan1 { | |
| 294 | + pinctrl-names = "default"; | |
| 295 | + pinctrl-0 = <&pinctrl_flexcan1>; | |
| 296 | + status = "okay"; | |
| 297 | +}; | |
| 298 | + | |
| 299 | +&flexcan2 { | |
| 300 | + pinctrl-names = "default"; | |
| 301 | + pinctrl-0 = <&pinctrl_flexcan2>; | |
| 302 | + status = "okay"; | |
| 303 | +}; | |
| 304 | + | |
| 305 | +/*+------------------------+ | |
| 500850 | 306 | + | MikroBUS interface | |
| G | 307 | + +------------------------+*/ |
| 308 | + | |
| 309 | +/* Same as RPi 40Pin extend interface: #32 */ | |
| 310 | +&pwm3 { | |
| 311 | + pinctrl-names = "default"; | |
| 312 | + pinctrl-0 = <&pinctrl_pwm3>; | |
| 313 | + status = "okay"; | |
| 314 | +}; | |
| 315 | + | |
| 316 | +/* Same as RPi 40Pin extend interface: #19, #21, #23, #24 */ | |
| 317 | +&uart1 { | |
| 318 | + pinctrl-names = "default"; | |
| 319 | + pinctrl-0 = <&pinctrl_uart1>; | |
| 320 | + assigned-clocks = <&clk IMX8MP_CLK_UART1>; | |
| 321 | + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; | |
| 322 | + status = "okay"; | |
| 323 | +}; | |
| 324 | + | |
| 325 | +/* Same as RPi 40Pin extend interface */ | |
| 326 | +&ecspi2 { | |
| 327 | + #address-cells = <1>; | |
| 328 | + #size-cells = <0>; | |
| 329 | + fsl,spi-num-chipselects = <1>; | |
| 330 | + pinctrl-names = "default"; | |
| 331 | + pinctrl-0 = <&pinctrl_ecspi2>; | |
| 332 | + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; | |
| 333 | + status = "okay"; | |
| 334 | + | |
| 335 | + spidev@0 { | |
| 336 | + compatible = "fsl,spidev", "semtech,sx1301"; | |
| 337 | + reg = <0>; | |
| 338 | + spi-max-frequency = <2000000>; | |
| 339 | + }; | |
| 340 | +}; | |
| 341 | + | |
| 342 | +/* Same as RPi 40Pin extend interface: #3, #5 */ | |
| 343 | +&i2c5 { | |
| 344 | + clock-frequency = <100000>; | |
| 345 | + pinctrl-names = "default"; | |
| 346 | + pinctrl-0 = <&pinctrl_i2c5>; | |
| 347 | + status = "okay"; | |
| 2b23f8 | 348 | + |
| G | 349 | + hdc1080@40 { |
| 350 | + compatible = "ti,hdc1080"; | |
| 351 | + reg = <0x40>; | |
| 352 | + status = "okay"; | |
| 353 | + }; | |
| 354 | + | |
| 355 | + eeprom@50 { | |
| 356 | + compatible = "microchip,24c32", "atmel,24c32"; | |
| 357 | + reg = <0x50>; | |
| 358 | + pagesize = <32>; | |
| 359 | + num-addresses = <8>; | |
| 360 | + }; | |
| 500850 | 361 | +}; |
| G | 362 | + |
| 363 | +/*+------------------------+ | |
| 7d0d56 | 364 | + | PCA9450CHN PMIC | |
| W | 365 | + +------------------------+*/ |
| 366 | + | |
| 367 | +&i2c1 { | |
| 368 | + clock-frequency = <400000>; | |
| 500850 | 369 | + pinctrl-names = "default"; |
| 7d0d56 | 370 | + pinctrl-0 = <&pinctrl_i2c1>; |
| W | 371 | + status = "okay"; |
| 372 | + | |
| 373 | + pmic@25 { | |
| 374 | + compatible = "nxp,pca9450c"; | |
| 375 | + reg = <0x25>; | |
| 376 | + pinctrl-names = "default"; | |
| 377 | + pinctrl-0 = <&pinctrl_pmic>; | |
| 378 | + interrupt-parent = <&gpio1>; | |
| 379 | + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; | |
| 380 | + | |
| 381 | + regulators { | |
| 382 | + buck1: BUCK1 { | |
| 383 | + regulator-name = "BUCK1"; | |
| 384 | + regulator-min-microvolt = <600000>; | |
| 385 | + regulator-max-microvolt = <2187500>; | |
| 386 | + regulator-boot-on; | |
| 387 | + regulator-always-on; | |
| 388 | + regulator-ramp-delay = <3125>; | |
| 389 | + }; | |
| 390 | + | |
| 391 | + buck2: BUCK2 { | |
| 392 | + regulator-name = "BUCK2"; | |
| 393 | + regulator-min-microvolt = <600000>; | |
| 394 | + regulator-max-microvolt = <2187500>; | |
| 395 | + regulator-boot-on; | |
| 396 | + regulator-always-on; | |
| 397 | + regulator-ramp-delay = <3125>; | |
| 398 | + nxp,dvs-run-voltage = <950000>; | |
| 399 | + nxp,dvs-standby-voltage = <850000>; | |
| 400 | + }; | |
| 401 | + | |
| 402 | + buck4: BUCK4{ | |
| 403 | + regulator-name = "BUCK4"; | |
| 404 | + regulator-min-microvolt = <600000>; | |
| 405 | + regulator-max-microvolt = <3400000>; | |
| 406 | + regulator-boot-on; | |
| 407 | + regulator-always-on; | |
| 408 | + }; | |
| 409 | + | |
| 410 | + buck5: BUCK5{ | |
| 411 | + regulator-name = "BUCK5"; | |
| 412 | + regulator-min-microvolt = <600000>; | |
| 413 | + regulator-max-microvolt = <3400000>; | |
| 414 | + regulator-boot-on; | |
| 415 | + regulator-always-on; | |
| 416 | + }; | |
| 417 | + | |
| 418 | + buck6: BUCK6 { | |
| 419 | + regulator-name = "BUCK6"; | |
| 420 | + regulator-min-microvolt = <600000>; | |
| 421 | + regulator-max-microvolt = <3400000>; | |
| 422 | + regulator-boot-on; | |
| 423 | + regulator-always-on; | |
| 424 | + }; | |
| 425 | + | |
| 426 | + ldo1: LDO1 { | |
| 427 | + regulator-name = "LDO1"; | |
| 428 | + regulator-min-microvolt = <1600000>; | |
| 429 | + regulator-max-microvolt = <3300000>; | |
| 430 | + regulator-boot-on; | |
| 431 | + regulator-always-on; | |
| 432 | + }; | |
| 433 | + | |
| 434 | + ldo2: LDO2 { | |
| 435 | + regulator-name = "LDO2"; | |
| 436 | + regulator-min-microvolt = <800000>; | |
| 437 | + regulator-max-microvolt = <1150000>; | |
| 438 | + regulator-boot-on; | |
| 439 | + regulator-always-on; | |
| 440 | + }; | |
| 441 | + | |
| 442 | + ldo3: LDO3 { | |
| 443 | + regulator-name = "LDO3"; | |
| 444 | + regulator-min-microvolt = <800000>; | |
| 445 | + regulator-max-microvolt = <3300000>; | |
| 446 | + regulator-boot-on; | |
| 447 | + regulator-always-on; | |
| 448 | + }; | |
| 449 | + | |
| 450 | + ldo4: LDO4 { | |
| 451 | + regulator-name = "LDO4"; | |
| 452 | + regulator-min-microvolt = <800000>; | |
| 453 | + regulator-max-microvolt = <3300000>; | |
| 454 | + regulator-boot-on; | |
| 455 | + regulator-always-on; | |
| 456 | + }; | |
| 457 | + | |
| 458 | + ldo5: LDO5 { | |
| 459 | + regulator-name = "LDO5"; | |
| 460 | + regulator-min-microvolt = <1800000>; | |
| 461 | + regulator-max-microvolt = <3300000>; | |
| 462 | + regulator-boot-on; | |
| 463 | + regulator-always-on; | |
| 464 | + }; | |
| 465 | + }; | |
| 466 | + }; | |
| 467 | +}; | |
| 468 | + | |
| 469 | +&iomuxc { | |
| 470 | + pinctrl-names = "default"; | |
| 471 | + | |
| 500850 | 472 | + pinctrl_wdog: wdoggrp { |
| G | 473 | + fsl,pins = < |
| 474 | + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6 | |
| 475 | + >; | |
| 476 | + }; | |
| 477 | + | |
| 7d0d56 | 478 | + pinctrl_leds: ledsgrp { |
| W | 479 | + fsl,pins = < |
| 480 | + MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x140 | |
| 7872ca | 481 | + MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x140 |
| G | 482 | + MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09 0x140 |
| 483 | + MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 | |
| 484 | + >; | |
| 485 | + }; | |
| 486 | + | |
| 487 | + pinctrl_keys: keysgrp { | |
| 488 | + fsl,pins = < | |
| 489 | + MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x140 | |
| 490 | + MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x140 | |
| 491 | + MX8MP_IOMUXC_UART3_RXD__GPIO5_IO26 0x140 | |
| 492 | + MX8MP_IOMUXC_UART3_TXD__GPIO5_IO27 0x140 | |
| 7d0d56 | 493 | + >; |
| W | 494 | + }; |
| 495 | + | |
| 500850 | 496 | + pinctrl_pwm1: pwm1grp { |
| 7d0d56 | 497 | + fsl,pins = < |
| 500850 | 498 | + MX8MP_IOMUXC_GPIO1_IO08__PWM1_OUT 0x116 |
| G | 499 | + >; |
| 500 | + }; | |
| 501 | + | |
| 502 | + pinctrl_pwm3: pwm3grp { | |
| 503 | + fsl,pins = < | |
| 504 | + MX8MP_IOMUXC_SAI5_RXC__PWM3_OUT 0x116 | |
| 505 | + >; | |
| 506 | + }; | |
| 507 | + | |
| 508 | + pinctrl_uart1: uart1grp { | |
| 509 | + fsl,pins = < | |
| 510 | + MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 | |
| 511 | + MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 | |
| 7d0d56 | 512 | + >; |
| W | 513 | + }; |
| 514 | + | |
| 515 | + pinctrl_uart2: uart2grp { | |
| 516 | + fsl,pins = < | |
| 517 | + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x49 | |
| 518 | + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x49 | |
| 519 | + >; | |
| 520 | + }; | |
| 521 | + | |
| ac4b9f | 522 | + pinctrl_uart3: uart3grp { |
| G | 523 | + fsl,pins = < |
| 524 | + MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x82 | |
| 525 | + MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x82 | |
| 526 | + >; | |
| 527 | + }; | |
| 528 | + | |
| 529 | + pinctrl_flexcan1: flexcan1grp { | |
| 530 | + fsl,pins = < | |
| 531 | + MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154 | |
| 532 | + MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154 | |
| 533 | + >; | |
| 534 | + }; | |
| 535 | + | |
| 536 | + pinctrl_flexcan2: flexcan2grp { | |
| 537 | + fsl,pins = < | |
| 538 | + MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX 0x154 | |
| 539 | + MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX 0x154 | |
| 540 | + >; | |
| 541 | + }; | |
| 542 | + | |
| 500850 | 543 | + pinctrl_ecspi2: ecspi2grp { |
| G | 544 | + fsl,pins = < |
| 545 | + MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82 | |
| 546 | + MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82 | |
| 547 | + MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82 | |
| 548 | + MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000 | |
| 549 | + >; | |
| 550 | + }; | |
| 551 | + | |
| 7d0d56 | 552 | + pinctrl_i2c1: i2c1grp { |
| W | 553 | + fsl,pins = < |
| 554 | + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3 | |
| 555 | + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3 | |
| 556 | + >; | |
| 557 | + }; | |
| 558 | + | |
| 2b23f8 | 559 | + pinctrl_i2c2: i2c2grp { |
| G | 560 | + fsl,pins = < |
| 561 | + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 | |
| 562 | + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 | |
| 563 | + >; | |
| 564 | + }; | |
| 565 | + | |
| 500850 | 566 | + pinctrl_i2c5: i2c5grp { |
| 7d0d56 | 567 | + fsl,pins = < |
| 500850 | 568 | + MX8MP_IOMUXC_SD1_CMD__I2C5_SDA 0x400001c2 |
| G | 569 | + MX8MP_IOMUXC_SD1_CLK__I2C5_SCL 0x400001c2 |
| 7d0d56 | 570 | + >; |
| W | 571 | + }; |
| 572 | + | |
| 573 | + pinctrl_pmic: pmicirq { | |
| 574 | + fsl,pins = < | |
| 575 | + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x41 | |
| 576 | + >; | |
| 577 | + }; | |
| 578 | + | |
| 579 | + pinctrl_usdhc2_gpio: usdhc2grp-gpio { | |
| 580 | + fsl,pins = < | |
| 581 | + MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 | |
| 582 | + >; | |
| 583 | + }; | |
| 584 | + | |
| 585 | + pinctrl_usdhc2: usdhc2grp { | |
| 586 | + fsl,pins = < | |
| 587 | + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 | |
| 588 | + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 | |
| 589 | + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 | |
| 590 | + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 | |
| 591 | + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 | |
| 592 | + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 | |
| 593 | + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 | |
| 594 | + >; | |
| 595 | + }; | |
| 596 | + | |
| 597 | + pinctrl_usdhc2_100mhz: usdhc2grp-100mhz { | |
| 598 | + fsl,pins = < | |
| 599 | + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 | |
| 600 | + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 | |
| 601 | + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 | |
| 602 | + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 | |
| 603 | + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 | |
| 604 | + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 | |
| 605 | + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 | |
| 606 | + >; | |
| 607 | + }; | |
| 608 | + | |
| 609 | + pinctrl_usdhc2_200mhz: usdhc2grp-200mhz { | |
| 610 | + fsl,pins = < | |
| 611 | + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 | |
| 612 | + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 | |
| 613 | + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 | |
| 614 | + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 | |
| 615 | + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 | |
| 616 | + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 | |
| 617 | + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 | |
| 618 | + >; | |
| 619 | + }; | |
| 620 | + | |
| 621 | + pinctrl_usdhc3: usdhc3grp { | |
| 622 | + fsl,pins = < | |
| 623 | + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 | |
| 624 | + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 | |
| 625 | + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 | |
| 626 | + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0 | |
| 627 | + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0 | |
| 628 | + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0 | |
| 629 | + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0 | |
| 630 | + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 | |
| 631 | + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 | |
| 632 | + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 | |
| 633 | + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 | |
| 634 | + >; | |
| 635 | + }; | |
| 636 | + | |
| 637 | + pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { | |
| 638 | + fsl,pins = < | |
| 639 | + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 | |
| 640 | + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 | |
| 641 | + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4 | |
| 642 | + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4 | |
| 643 | + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4 | |
| 644 | + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4 | |
| 645 | + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4 | |
| 646 | + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 | |
| 647 | + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 | |
| 648 | + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 | |
| 649 | + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 | |
| 650 | + >; | |
| 651 | + }; | |
| 652 | + | |
| 653 | + pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { | |
| 654 | + fsl,pins = < | |
| 655 | + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196 | |
| 656 | + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6 | |
| 657 | + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6 | |
| 658 | + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6 | |
| 659 | + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6 | |
| 660 | + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6 | |
| 661 | + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6 | |
| 662 | + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6 | |
| 663 | + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6 | |
| 664 | + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6 | |
| 665 | + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196 | |
| 666 | + >; | |
| 667 | + }; | |
| 668 | + | |
| 669 | + pinctrl_eqos: eqosgrp { | |
| 670 | + fsl,pins = < | |
| 671 | + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2 | |
| 672 | + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2 | |
| 673 | + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90 | |
| 674 | + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90 | |
| 675 | + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90 | |
| 676 | + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90 | |
| 677 | + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90 | |
| 678 | + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90 | |
| 679 | + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16 | |
| 680 | + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16 | |
| 681 | + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16 | |
| 682 | + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16 | |
| 683 | + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16 | |
| 684 | + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16 | |
| 685 | + >; | |
| 686 | + }; | |
| 687 | + | |
| 688 | + pinctrl_fec: fecgrp { | |
| 689 | + fsl,pins = < | |
| 690 | + MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2 | |
| 691 | + MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2 | |
| 692 | + MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 | |
| 693 | + MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 | |
| 694 | + MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 | |
| 695 | + MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 | |
| 696 | + MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 | |
| 697 | + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 | |
| 698 | + MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16 | |
| 699 | + MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16 | |
| 700 | + MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16 | |
| 701 | + MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16 | |
| 702 | + MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16 | |
| 703 | + MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16 | |
| 704 | + >; | |
| 705 | + }; | |
| 706 | +}; | |
| 707 | diff --git a/arch/arm64/configs/igkboard-imx8mp_defconfig b/arch/arm64/configs/igkboard-imx8mp_defconfig | |
| 708 | new file mode 100644 | |
| 2b23f8 | 709 | index 000000000..d5bb6e7bf |
| 7d0d56 | 710 | --- /dev/null |
| W | 711 | +++ b/arch/arm64/configs/igkboard-imx8mp_defconfig |
| 2b23f8 | 712 | @@ -0,0 +1,1108 @@ |
| 7d0d56 | 713 | +CONFIG_SYSVIPC=y |
| W | 714 | +CONFIG_POSIX_MQUEUE=y |
| 715 | +CONFIG_AUDIT=y | |
| 716 | +CONFIG_NO_HZ_IDLE=y | |
| 717 | +CONFIG_HIGH_RES_TIMERS=y | |
| 718 | +CONFIG_BPF_SYSCALL=y | |
| 719 | +CONFIG_BPF_JIT=y | |
| 720 | +CONFIG_PREEMPT=y | |
| 721 | +CONFIG_IRQ_TIME_ACCOUNTING=y | |
| 722 | +CONFIG_BSD_PROCESS_ACCT=y | |
| 723 | +CONFIG_BSD_PROCESS_ACCT_V3=y | |
| 724 | +CONFIG_TASKSTATS=y | |
| 725 | +CONFIG_TASK_XACCT=y | |
| 726 | +CONFIG_TASK_IO_ACCOUNTING=y | |
| 727 | +CONFIG_IKCONFIG=y | |
| 728 | +CONFIG_IKCONFIG_PROC=y | |
| 729 | +CONFIG_NUMA_BALANCING=y | |
| 730 | +CONFIG_MEMCG=y | |
| 731 | +CONFIG_BLK_CGROUP=y | |
| 732 | +CONFIG_CGROUP_PIDS=y | |
| 733 | +CONFIG_CGROUP_FREEZER=y | |
| 734 | +CONFIG_CGROUP_HUGETLB=y | |
| 735 | +CONFIG_CPUSETS=y | |
| 736 | +CONFIG_CGROUP_DEVICE=y | |
| 737 | +CONFIG_CGROUP_CPUACCT=y | |
| 738 | +CONFIG_CGROUP_PERF=y | |
| 739 | +CONFIG_CGROUP_BPF=y | |
| f77a70 | 740 | +CONFIG_NAMESPACES=y |
| 7d0d56 | 741 | +CONFIG_USER_NS=y |
| W | 742 | +CONFIG_SCHED_AUTOGROUP=y |
| 743 | +CONFIG_RELAY=y | |
| 744 | +CONFIG_BLK_DEV_INITRD=y | |
| f77a70 | 745 | +CONFIG_EXPERT=y |
| 7d0d56 | 746 | +CONFIG_KALLSYMS_ALL=y |
| W | 747 | +CONFIG_PROFILING=y |
| 748 | +CONFIG_ARCH_KEEMBAY=y | |
| 749 | +CONFIG_ARCH_NXP=y | |
| 750 | +CONFIG_ARCH_LAYERSCAPE=y | |
| 751 | +CONFIG_ARCH_MXC=y | |
| 752 | +CONFIG_ARCH_S32=y | |
| 753 | +CONFIG_SOC_S32V234=y | |
| 754 | +CONFIG_ARM64_VA_BITS_48=y | |
| 755 | +CONFIG_SCHED_MC=y | |
| 756 | +CONFIG_SCHED_SMT=y | |
| 757 | +CONFIG_NUMA=y | |
| 758 | +CONFIG_KEXEC=y | |
| 759 | +CONFIG_KEXEC_FILE=y | |
| 760 | +CONFIG_CRASH_DUMP=y | |
| 761 | +CONFIG_XEN=y | |
| 762 | +CONFIG_ARCH_FORCE_MAX_ORDER=14 | |
| 763 | +CONFIG_COMPAT=y | |
| 764 | +CONFIG_RANDOMIZE_BASE=y | |
| 765 | +CONFIG_PM_DEBUG=y | |
| 766 | +CONFIG_PM_TEST_SUSPEND=y | |
| 767 | +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y | |
| 768 | +CONFIG_ENERGY_MODEL=y | |
| 769 | +CONFIG_ARM_PSCI_CPUIDLE=y | |
| 770 | +CONFIG_CPU_FREQ=y | |
| 771 | +CONFIG_CPU_FREQ_STAT=y | |
| 772 | +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | |
| 773 | +CONFIG_CPU_FREQ_GOV_POWERSAVE=y | |
| 774 | +CONFIG_CPU_FREQ_GOV_USERSPACE=y | |
| 775 | +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y | |
| 776 | +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y | |
| 777 | +CONFIG_CPUFREQ_DT=y | |
| 778 | +CONFIG_ACPI_CPPC_CPUFREQ=m | |
| 779 | +CONFIG_ARM_SCPI_CPUFREQ=y | |
| 780 | +CONFIG_ARM_IMX_CPUFREQ_DT=y | |
| 781 | +CONFIG_ARM_SCMI_CPUFREQ=y | |
| 782 | +CONFIG_QORIQ_CPUFREQ=y | |
| 783 | +CONFIG_ACPI=y | |
| 784 | +CONFIG_ACPI_APEI=y | |
| 785 | +CONFIG_ACPI_APEI_GHES=y | |
| 786 | +CONFIG_ACPI_APEI_MEMORY_FAILURE=y | |
| 787 | +CONFIG_ACPI_APEI_EINJ=y | |
| 788 | +CONFIG_VIRTUALIZATION=y | |
| 789 | +CONFIG_KVM=y | |
| 790 | +CONFIG_JUMP_LABEL=y | |
| 791 | +CONFIG_MODULES=y | |
| 792 | +CONFIG_MODULE_UNLOAD=y | |
| 793 | +CONFIG_MODVERSIONS=y | |
| 794 | +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | |
| 795 | +# CONFIG_COMPAT_BRK is not set | |
| 796 | +CONFIG_KSM=y | |
| 797 | +CONFIG_MEMORY_FAILURE=y | |
| 798 | +CONFIG_TRANSPARENT_HUGEPAGE=y | |
| 799 | +CONFIG_NET=y | |
| 800 | +CONFIG_PACKET=y | |
| 801 | +CONFIG_UNIX=y | |
| 802 | +CONFIG_TLS=y | |
| 803 | +CONFIG_TLS_DEVICE=y | |
| 804 | +CONFIG_INET=y | |
| 805 | +CONFIG_IP_MULTICAST=y | |
| 806 | +CONFIG_IP_PNP=y | |
| 807 | +CONFIG_IP_PNP_DHCP=y | |
| 808 | +CONFIG_IP_PNP_BOOTP=y | |
| 809 | +CONFIG_IPV6_SIT=m | |
| 810 | +CONFIG_NETFILTER=y | |
| 811 | +CONFIG_BRIDGE_NETFILTER=m | |
| 812 | +CONFIG_NETFILTER_NETLINK_OSF=m | |
| 813 | +CONFIG_NF_CONNTRACK=m | |
| 814 | +CONFIG_NF_CONNTRACK_EVENTS=y | |
| 815 | +CONFIG_NF_TABLES=y | |
| 816 | +CONFIG_NF_TABLES_INET=y | |
| 817 | +CONFIG_NF_TABLES_NETDEV=y | |
| 818 | +CONFIG_NFT_CT=m | |
| 819 | +CONFIG_NFT_MASQ=m | |
| 820 | +CONFIG_NFT_NAT=m | |
| 821 | +CONFIG_NFT_COMPAT=m | |
| 822 | +CONFIG_NFT_DUP_NETDEV=m | |
| 823 | +CONFIG_NFT_FWD_NETDEV=m | |
| 824 | +CONFIG_NF_FLOW_TABLE=m | |
| 825 | +CONFIG_NETFILTER_XT_MARK=m | |
| 826 | +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m | |
| 827 | +CONFIG_NETFILTER_XT_TARGET_LOG=m | |
| 828 | +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m | |
| 829 | +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m | |
| 830 | +CONFIG_NETFILTER_XT_MATCH_IPVS=m | |
| 831 | +CONFIG_IP_VS=m | |
| 832 | +CONFIG_NF_SOCKET_IPV4=m | |
| 833 | +CONFIG_NF_TPROXY_IPV4=m | |
| 834 | +CONFIG_IP_NF_IPTABLES=m | |
| 835 | +CONFIG_IP_NF_FILTER=m | |
| 836 | +CONFIG_IP_NF_TARGET_REJECT=m | |
| 837 | +CONFIG_IP_NF_NAT=m | |
| 838 | +CONFIG_IP_NF_TARGET_MASQUERADE=m | |
| 839 | +CONFIG_IP_NF_MANGLE=m | |
| 840 | +CONFIG_NF_SOCKET_IPV6=m | |
| 841 | +CONFIG_NF_TPROXY_IPV6=m | |
| 842 | +CONFIG_IP6_NF_IPTABLES=m | |
| 843 | +CONFIG_IP6_NF_FILTER=m | |
| 844 | +CONFIG_IP6_NF_TARGET_REJECT=m | |
| 845 | +CONFIG_IP6_NF_MANGLE=m | |
| 846 | +CONFIG_IP6_NF_NAT=m | |
| 847 | +CONFIG_IP6_NF_TARGET_MASQUERADE=m | |
| 848 | +CONFIG_NF_TABLES_BRIDGE=m | |
| 849 | +CONFIG_BRIDGE_NF_EBTABLES=m | |
| 850 | +CONFIG_BRIDGE=y | |
| 851 | +CONFIG_BRIDGE_VLAN_FILTERING=y | |
| 852 | +CONFIG_NET_DSA=m | |
| 853 | +CONFIG_VLAN_8021Q_GVRP=y | |
| 854 | +CONFIG_VLAN_8021Q_MVRP=y | |
| 855 | +CONFIG_LLC2=y | |
| 856 | +CONFIG_NET_SCHED=y | |
| 857 | +CONFIG_NET_SCH_MULTIQ=m | |
| 858 | +CONFIG_NET_SCH_CBS=m | |
| 859 | +CONFIG_NET_SCH_ETF=m | |
| 860 | +CONFIG_NET_SCH_TAPRIO=m | |
| 861 | +CONFIG_NET_SCH_MQPRIO=m | |
| 862 | +CONFIG_NET_SCH_INGRESS=m | |
| 863 | +CONFIG_NET_CLS_BASIC=m | |
| 864 | +CONFIG_NET_CLS_U32=m | |
| 865 | +CONFIG_NET_CLS_FLOWER=m | |
| 866 | +CONFIG_NET_CLS_ACT=y | |
| 867 | +CONFIG_NET_ACT_GACT=m | |
| 868 | +CONFIG_NET_ACT_MIRRED=m | |
| 869 | +CONFIG_NET_ACT_SKBEDIT=m | |
| 870 | +CONFIG_NET_ACT_GATE=m | |
| 871 | +CONFIG_TSN=y | |
| 872 | +CONFIG_QRTR=m | |
| 873 | +CONFIG_QRTR_SMD=m | |
| 874 | +CONFIG_QRTR_TUN=m | |
| 875 | +CONFIG_NET_PKTGEN=m | |
| ac4b9f | 876 | +CONFIG_CAN=y |
| G | 877 | +CONFIG_CAN_ISOTP=y |
| 7d0d56 | 878 | +CONFIG_BT=y |
| W | 879 | +CONFIG_BT_RFCOMM=y |
| 880 | +CONFIG_BT_RFCOMM_TTY=y | |
| 881 | +CONFIG_BT_BNEP=y | |
| 882 | +CONFIG_BT_BNEP_MC_FILTER=y | |
| 883 | +CONFIG_BT_BNEP_PROTO_FILTER=y | |
| 884 | +CONFIG_BT_HIDP=y | |
| 885 | +CONFIG_BT_LEDS=y | |
| 886 | +# CONFIG_BT_DEBUGFS is not set | |
| 887 | +CONFIG_BT_HCIBTUSB=m | |
| 888 | +CONFIG_BT_HCIUART=y | |
| 889 | +CONFIG_BT_HCIUART_BCSP=y | |
| 890 | +CONFIG_BT_HCIUART_ATH3K=y | |
| 891 | +CONFIG_BT_HCIUART_LL=y | |
| 892 | +CONFIG_BT_HCIUART_3WIRE=y | |
| 893 | +CONFIG_BT_HCIUART_BCM=y | |
| 894 | +CONFIG_BT_HCIUART_QCA=y | |
| 895 | +CONFIG_BT_HCIVHCI=y | |
| 896 | +CONFIG_BT_NXPUART=m | |
| 897 | +CONFIG_CFG80211=y | |
| 898 | +CONFIG_NL80211_TESTMODE=y | |
| 899 | +CONFIG_CFG80211_WEXT=y | |
| 900 | +CONFIG_MAC80211=y | |
| 901 | +CONFIG_MAC80211_LEDS=y | |
| 902 | +CONFIG_NFC=m | |
| 903 | +CONFIG_NFC_NCI=m | |
| 904 | +CONFIG_NFC_S3FWRN5_I2C=m | |
| 905 | +CONFIG_PCI=y | |
| 906 | +CONFIG_PCIEPORTBUS=y | |
| 907 | +CONFIG_PCI_IOV=y | |
| 908 | +CONFIG_PCI_PASID=y | |
| 909 | +CONFIG_HOTPLUG_PCI=y | |
| 910 | +CONFIG_HOTPLUG_PCI_ACPI=y | |
| 911 | +CONFIG_PCI_HOST_GENERIC=y | |
| 912 | +CONFIG_PCI_XGENE=y | |
| 913 | +CONFIG_PCIE_ALTERA=y | |
| 914 | +CONFIG_PCIE_ALTERA_MSI=y | |
| 915 | +CONFIG_PCI_HOST_THUNDER_PEM=y | |
| 916 | +CONFIG_PCI_HOST_THUNDER_ECAM=y | |
| 917 | +CONFIG_PCI_IMX6_HOST=y | |
| 918 | +CONFIG_PCI_IMX6_EP=y | |
| 919 | +CONFIG_PCI_LAYERSCAPE=y | |
| 920 | +CONFIG_PCI_HISI=y | |
| 921 | +CONFIG_PCIE_KIRIN=y | |
| 922 | +CONFIG_PCI_MESON=m | |
| 923 | +CONFIG_PCIE_LAYERSCAPE_GEN4=y | |
| 924 | +CONFIG_PCI_ENDPOINT=y | |
| 925 | +CONFIG_PCI_ENDPOINT_CONFIGFS=y | |
| 926 | +CONFIG_PCI_EPF_TEST=y | |
| 927 | +CONFIG_DEVTMPFS=y | |
| 928 | +CONFIG_DEVTMPFS_MOUNT=y | |
| 929 | +CONFIG_FW_LOADER_USER_HELPER=y | |
| 930 | +CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y | |
| 931 | +CONFIG_BRCMSTB_GISB_ARB=y | |
| 932 | +CONFIG_VEXPRESS_CONFIG=y | |
| 933 | +CONFIG_FSL_MC_UAPI_SUPPORT=y | |
| 934 | +CONFIG_ARM_SCMI_PROTOCOL=y | |
| 935 | +CONFIG_ARM_SCPI_PROTOCOL=y | |
| 936 | +CONFIG_EFI_CAPSULE_LOADER=y | |
| 937 | +CONFIG_IMX_DSP=y | |
| 938 | +CONFIG_IMX_SCU=y | |
| 939 | +CONFIG_IMX_SCU_PD=y | |
| 940 | +CONFIG_IMX_EL_ENCLAVE=y | |
| 941 | +CONFIG_GNSS=m | |
| 942 | +CONFIG_GNSS_MTK_SERIAL=m | |
| 943 | +CONFIG_MTD=y | |
| 944 | +CONFIG_MTD_CMDLINE_PARTS=y | |
| 945 | +CONFIG_MTD_BLOCK=y | |
| 946 | +CONFIG_MTD_CFI=y | |
| 947 | +CONFIG_MTD_CFI_ADV_OPTIONS=y | |
| 948 | +CONFIG_MTD_CFI_INTELEXT=y | |
| 949 | +CONFIG_MTD_CFI_AMDSTD=y | |
| 950 | +CONFIG_MTD_CFI_STAA=y | |
| 951 | +CONFIG_MTD_PHYSMAP=y | |
| 952 | +CONFIG_MTD_PHYSMAP_OF=y | |
| 953 | +CONFIG_MTD_DATAFLASH=y | |
| 954 | +CONFIG_MTD_SST25L=y | |
| 955 | +CONFIG_MTD_RAW_NAND=y | |
| 956 | +CONFIG_MTD_NAND_DENALI_DT=y | |
| 957 | +CONFIG_MTD_NAND_GPMI_NAND=y | |
| 958 | +CONFIG_MTD_NAND_FSL_IFC=y | |
| 959 | +CONFIG_MTD_SPI_NAND=y | |
| 960 | +CONFIG_MTD_SPI_NOR=y | |
| 961 | +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set | |
| 962 | +CONFIG_MTD_UBI=y | |
| 963 | +CONFIG_BLK_DEV_LOOP=y | |
| 964 | +CONFIG_BLK_DEV_NBD=m | |
| 965 | +CONFIG_XEN_BLKDEV_BACKEND=m | |
| 966 | +CONFIG_VIRTIO_BLK=y | |
| 967 | +CONFIG_BLK_DEV_NVME=y | |
| 968 | +CONFIG_SRAM=y | |
| 969 | +CONFIG_PCI_ENDPOINT_TEST=y | |
| 2b23f8 | 970 | +CONFIG_EEPROM_AT24=y |
| 7d0d56 | 971 | +CONFIG_UACCE=m |
| W | 972 | +# CONFIG_SCSI_PROC_FS is not set |
| 973 | +CONFIG_BLK_DEV_SD=y | |
| 974 | +CONFIG_SCSI_SAS_ATA=y | |
| 975 | +CONFIG_SCSI_HISI_SAS=y | |
| 976 | +CONFIG_SCSI_HISI_SAS_PCI=y | |
| 977 | +CONFIG_MEGARAID_SAS=y | |
| 978 | +CONFIG_SCSI_MPT3SAS=m | |
| 979 | +CONFIG_ATA=y | |
| 980 | +CONFIG_SATA_AHCI=y | |
| 981 | +CONFIG_SATA_AHCI_PLATFORM=y | |
| 982 | +CONFIG_AHCI_IMX=y | |
| 983 | +CONFIG_AHCI_CEVA=y | |
| 984 | +CONFIG_AHCI_XGENE=y | |
| 985 | +CONFIG_AHCI_QORIQ=y | |
| 986 | +CONFIG_SATA_SIL24=y | |
| 987 | +CONFIG_PATA_OF_PLATFORM=y | |
| 988 | +CONFIG_MD=y | |
| 989 | +CONFIG_BLK_DEV_MD=m | |
| 990 | +CONFIG_BLK_DEV_DM=m | |
| 991 | +CONFIG_DM_CRYPT=m | |
| 992 | +CONFIG_DM_MIRROR=m | |
| 993 | +CONFIG_DM_ZERO=m | |
| 994 | +CONFIG_NETDEVICES=y | |
| 995 | +CONFIG_MACVLAN=m | |
| 996 | +CONFIG_MACVTAP=m | |
| 997 | +CONFIG_TUN=y | |
| 998 | +CONFIG_VETH=m | |
| 999 | +CONFIG_VIRTIO_NET=y | |
| 1000 | +CONFIG_NET_DSA_MSCC_FELIX=m | |
| 1001 | +CONFIG_NET_DSA_SJA1105=m | |
| 1002 | +CONFIG_NET_DSA_SJA1105_PTP=y | |
| 1003 | +CONFIG_NET_DSA_SJA1105_TAS=y | |
| 1004 | +CONFIG_NET_DSA_SJA1105_VL=y | |
| 1005 | +CONFIG_AMD_XGBE=y | |
| 1006 | +CONFIG_ATL1C=m | |
| 1007 | +CONFIG_BCMGENET=m | |
| 1008 | +CONFIG_BNX2X=m | |
| 1009 | +CONFIG_SYSTEMPORT=m | |
| 1010 | +CONFIG_MACB=y | |
| 1011 | +CONFIG_THUNDER_NIC_PF=y | |
| 1012 | +CONFIG_FEC=y | |
| 1013 | +CONFIG_FEC_UIO=y | |
| 1014 | +CONFIG_FSL_FMAN=y | |
| 1015 | +CONFIG_FSL_DPAA_ETH=y | |
| 1016 | +CONFIG_FSL_DPAA2_ETH=y | |
| 1017 | +CONFIG_FSL_DPAA2_MAC=y | |
| 1018 | +CONFIG_FSL_DPAA2_SWITCH=y | |
| 1019 | +CONFIG_FSL_ENETC=y | |
| 1020 | +CONFIG_FSL_ENETC_VF=y | |
| 1021 | +CONFIG_FSL_ENETC_QOS=y | |
| 1022 | +CONFIG_ENETC_TSN=y | |
| 1023 | +CONFIG_HIX5HD2_GMAC=y | |
| 1024 | +CONFIG_HNS_DSAF=y | |
| 1025 | +CONFIG_HNS_ENET=y | |
| 1026 | +CONFIG_HNS3=y | |
| 1027 | +CONFIG_HNS3_HCLGE=y | |
| 1028 | +CONFIG_HNS3_ENET=y | |
| 1029 | +CONFIG_E1000=y | |
| 1030 | +CONFIG_E1000E=y | |
| 1031 | +CONFIG_IGB=y | |
| 1032 | +CONFIG_IGBVF=y | |
| 1033 | +CONFIG_MVMDIO=y | |
| 1034 | +CONFIG_SKY2=y | |
| 1035 | +CONFIG_MLX4_EN=m | |
| 1036 | +CONFIG_MLX5_CORE=m | |
| 1037 | +CONFIG_MLX5_CORE_EN=y | |
| 1038 | +CONFIG_MSCC_OCELOT_SWITCH=y | |
| 1039 | +CONFIG_QCOM_EMAC=m | |
| 1040 | +CONFIG_RMNET=m | |
| 1041 | +CONFIG_SMC91X=y | |
| 1042 | +CONFIG_SMSC911X=y | |
| 1043 | +CONFIG_STMMAC_ETH=y | |
| 1044 | +CONFIG_DWMAC_GENERIC=m | |
| 1045 | +CONFIG_AQUANTIA_PHY=y | |
| 1046 | +CONFIG_BROADCOM_PHY=m | |
| 1047 | +CONFIG_BCM54140_PHY=m | |
| 1048 | +CONFIG_MARVELL_PHY=m | |
| 1049 | +CONFIG_MARVELL_10G_PHY=m | |
| 1050 | +CONFIG_MICREL_PHY=y | |
| 1051 | +CONFIG_MICROSEMI_PHY=y | |
| 1052 | +CONFIG_NXP_C45_TJA11XX_PHY=y | |
| 1053 | +CONFIG_NXP_TJA11XX_PHY=y | |
| 1054 | +CONFIG_AT803X_PHY=y | |
| 1055 | +CONFIG_REALTEK_PHY=y | |
| 1056 | +CONFIG_ROCKCHIP_PHY=y | |
| 1057 | +CONFIG_VITESSE_PHY=y | |
| ac4b9f | 1058 | +CONFIG_CAN_FLEXCAN=y |
| 7d0d56 | 1059 | +CONFIG_MDIO_BITBANG=y |
| W | 1060 | +CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y |
| 1061 | +CONFIG_MDIO_BUS_MUX_MMIOREG=y | |
| 1062 | +CONFIG_USB_PEGASUS=m | |
| 1063 | +CONFIG_USB_RTL8150=m | |
| 1064 | +CONFIG_USB_RTL8152=y | |
| 1065 | +CONFIG_USB_LAN78XX=m | |
| 1066 | +CONFIG_USB_USBNET=y | |
| 1067 | +CONFIG_USB_NET_AX8817X=m | |
| 1068 | +CONFIG_USB_NET_AX88179_178A=m | |
| 1069 | +CONFIG_USB_NET_CDCETHER=m | |
| 1070 | +CONFIG_USB_NET_CDC_NCM=m | |
| 1071 | +CONFIG_USB_NET_DM9601=m | |
| 1072 | +CONFIG_USB_NET_SR9800=m | |
| 1073 | +CONFIG_USB_NET_SMSC75XX=m | |
| 1074 | +CONFIG_USB_NET_SMSC95XX=m | |
| 1075 | +CONFIG_USB_NET_NET1080=m | |
| 1076 | +CONFIG_USB_NET_PLUSB=m | |
| 1077 | +CONFIG_USB_NET_MCS7830=m | |
| 1078 | +CONFIG_USB_NET_CDC_SUBSET=m | |
| 1079 | +CONFIG_USB_NET_ZAURUS=m | |
| 1080 | +CONFIG_HOSTAP=y | |
| 1081 | +CONFIG_WL18XX=m | |
| 1082 | +CONFIG_WLCORE_SDIO=m | |
| 1083 | +CONFIG_XEN_NETDEV_BACKEND=m | |
| 1084 | +CONFIG_IVSHMEM_NET=y | |
| 1085 | +CONFIG_INPUT_EVDEV=y | |
| 1086 | +CONFIG_KEYBOARD_ADC=m | |
| 1087 | +CONFIG_KEYBOARD_GPIO=y | |
| 1088 | +CONFIG_KEYBOARD_RPMSG=y | |
| 1089 | +CONFIG_KEYBOARD_SNVS_PWRKEY=y | |
| 1090 | +CONFIG_KEYBOARD_BBNSM_PWRKEY=y | |
| 1091 | +CONFIG_KEYBOARD_IMX_SC_KEY=y | |
| 1092 | +CONFIG_KEYBOARD_CROS_EC=y | |
| 1093 | +CONFIG_INPUT_TOUCHSCREEN=y | |
| 1094 | +CONFIG_TOUCHSCREEN_ATMEL_MXT=m | |
| 1095 | +CONFIG_TOUCHSCREEN_EXC3000=m | |
| 1096 | +CONFIG_TOUCHSCREEN_GOODIX=m | |
| 1097 | +CONFIG_TOUCHSCREEN_EDT_FT5X06=m | |
| 1098 | +CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_I2C=m | |
| 1099 | +CONFIG_INPUT_MISC=y | |
| 1100 | +CONFIG_INPUT_PWM_BEEPER=m | |
| 1101 | +CONFIG_INPUT_PWM_VIBRA=m | |
| 1102 | +# CONFIG_SERIO_SERPORT is not set | |
| 1103 | +CONFIG_SERIO_AMBAKMI=y | |
| 1104 | +CONFIG_LEGACY_PTY_COUNT=16 | |
| 1105 | +CONFIG_SERIAL_8250=y | |
| 1106 | +CONFIG_SERIAL_8250_CONSOLE=y | |
| 1107 | +CONFIG_SERIAL_8250_EXTENDED=y | |
| 1108 | +CONFIG_SERIAL_8250_SHARE_IRQ=y | |
| 1109 | +CONFIG_SERIAL_8250_DW=y | |
| 1110 | +CONFIG_SERIAL_OF_PLATFORM=y | |
| 1111 | +CONFIG_SERIAL_AMBA_PL011=y | |
| 1112 | +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y | |
| 1113 | +CONFIG_SERIAL_IMX=y | |
| 1114 | +CONFIG_SERIAL_IMX_CONSOLE=y | |
| 1115 | +CONFIG_SERIAL_XILINX_PS_UART=y | |
| 1116 | +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y | |
| 1117 | +CONFIG_SERIAL_FSL_LPUART=y | |
| 1118 | +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y | |
| 1119 | +CONFIG_SERIAL_FSL_LINFLEXUART=y | |
| 1120 | +CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y | |
| 1121 | +CONFIG_SERIAL_DEV_BUS=y | |
| 1122 | +CONFIG_VIRTIO_CONSOLE=y | |
| 1123 | +CONFIG_IPMI_HANDLER=m | |
| 1124 | +CONFIG_IPMI_DEVICE_INTERFACE=m | |
| 1125 | +CONFIG_IPMI_SI=m | |
| 1126 | +CONFIG_TCG_TPM=y | |
| 1127 | +CONFIG_TCG_TIS_I2C_INFINEON=y | |
| 1128 | +CONFIG_I2C_CHARDEV=y | |
| 1129 | +CONFIG_I2C_MUX=y | |
| 1130 | +CONFIG_I2C_MUX_GPIO=y | |
| 1131 | +CONFIG_I2C_MUX_PCA954x=y | |
| 1132 | +CONFIG_I2C_DESIGNWARE_PLATFORM=y | |
| 1133 | +CONFIG_I2C_GPIO=m | |
| 1134 | +CONFIG_I2C_IMX=y | |
| 1135 | +CONFIG_I2C_IMX_LPI2C=y | |
| 1136 | +CONFIG_I2C_RK3X=y | |
| 1137 | +CONFIG_I2C_RPBUS=y | |
| 1138 | +CONFIG_I2C_CROS_EC_TUNNEL=y | |
| 1139 | +CONFIG_I2C_SLAVE_EEPROM=y | |
| 1140 | +CONFIG_I3C=y | |
| 1141 | +CONFIG_SVC_I3C_MASTER=y | |
| 1142 | +CONFIG_SPI=y | |
| 1143 | +CONFIG_SPI_CADENCE_QUADSPI=y | |
| 1144 | +CONFIG_SPI_DESIGNWARE=m | |
| 1145 | +CONFIG_SPI_DW_DMA=y | |
| 1146 | +CONFIG_SPI_DW_MMIO=m | |
| 1147 | +CONFIG_SPI_FSL_LPSPI=y | |
| 1148 | +CONFIG_SPI_FSL_QUADSPI=y | |
| 1149 | +CONFIG_SPI_NXP_FLEXSPI=y | |
| 1150 | +CONFIG_SPI_IMX=y | |
| 1151 | +CONFIG_SPI_FSL_DSPI=y | |
| 1152 | +CONFIG_SPI_PL022=y | |
| 1153 | +CONFIG_SPI_ROCKCHIP=y | |
| 1154 | +CONFIG_SPI_SPIDEV=y | |
| 1155 | +CONFIG_SPI_SLAVE=y | |
| 1156 | +CONFIG_SPI_SLAVE_TIME=y | |
| 1157 | +CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y | |
| 1158 | +CONFIG_SPMI=y | |
| 1159 | +CONFIG_PPS_CLIENT_GPIO=y | |
| 1160 | +CONFIG_PINCTRL_MAX77620=y | |
| 1161 | +CONFIG_PINCTRL_SINGLE=y | |
| 1162 | +CONFIG_PINCTRL_IMX8MM=y | |
| 1163 | +CONFIG_PINCTRL_IMX8MN=y | |
| 1164 | +CONFIG_PINCTRL_IMX8MP=y | |
| 1165 | +CONFIG_PINCTRL_IMX8MQ=y | |
| 1166 | +CONFIG_PINCTRL_IMX8QM=y | |
| 1167 | +CONFIG_PINCTRL_IMX8QXP=y | |
| 1168 | +CONFIG_PINCTRL_IMX8DXL=y | |
| 1169 | +CONFIG_PINCTRL_IMX8ULP=y | |
| 1170 | +CONFIG_PINCTRL_IMX93=y | |
| 1171 | +CONFIG_PINCTRL_S32V234=y | |
| f77a70 | 1172 | +CONFIG_GPIO_SYSFS=y |
| 7d0d56 | 1173 | +CONFIG_GPIO_MXC=y |
| W | 1174 | +CONFIG_POWER_RESET_BRCMSTB=y |
| 1175 | +CONFIG_POWER_RESET_XGENE=y | |
| 1176 | +CONFIG_POWER_RESET_SYSCON=y | |
| 1177 | +CONFIG_SYSCON_REBOOT_MODE=y | |
| 1178 | +CONFIG_BATTERY_SBS=m | |
| 1179 | +CONFIG_BATTERY_BQ27XXX=y | |
| 1180 | +CONFIG_BATTERY_MAX17042=m | |
| 1181 | +CONFIG_CHARGER_BQ25890=m | |
| 1182 | +CONFIG_CHARGER_BQ25980=m | |
| 1183 | +CONFIG_SENSORS_ARM_SCMI=y | |
| 1184 | +CONFIG_SENSORS_ARM_SCPI=y | |
| 1185 | +CONFIG_SENSORS_FP9931=y | |
| 1186 | +CONFIG_SENSORS_LM90=m | |
| 1187 | +CONFIG_SENSORS_PWM_FAN=m | |
| 1188 | +CONFIG_SENSORS_SL28CPLD=m | |
| 1189 | +CONFIG_SENSORS_INA2XX=m | |
| 1190 | +CONFIG_SENSORS_INA3221=m | |
| 1191 | +CONFIG_THERMAL_WRITABLE_TRIPS=y | |
| 1192 | +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y | |
| 1193 | +CONFIG_CPU_THERMAL=y | |
| 1194 | +CONFIG_THERMAL_EMULATION=y | |
| 1195 | +CONFIG_IMX_SC_THERMAL=y | |
| 1196 | +CONFIG_IMX8MM_THERMAL=y | |
| 1197 | +CONFIG_DEVICE_THERMAL=y | |
| 1198 | +CONFIG_QORIQ_THERMAL=y | |
| 1199 | +CONFIG_WATCHDOG=y | |
| 1200 | +CONFIG_SL28CPLD_WATCHDOG=m | |
| 1201 | +CONFIG_ARM_SP805_WATCHDOG=y | |
| 1202 | +CONFIG_ARM_SBSA_WATCHDOG=y | |
| 1203 | +CONFIG_DW_WATCHDOG=y | |
| 1204 | +CONFIG_IMX2_WDT=y | |
| 1205 | +CONFIG_IMX_SC_WDT=y | |
| 1206 | +CONFIG_IMX7ULP_WDT=y | |
| 1207 | +CONFIG_ARM_SMC_WATCHDOG=y | |
| 1208 | +CONFIG_XEN_WDT=y | |
| 1209 | +CONFIG_MFD_ADP5585=y | |
| 1210 | +CONFIG_MFD_BD9571MWV=y | |
| 1211 | +CONFIG_MFD_AXP20X_I2C=y | |
| 1212 | +CONFIG_MFD_IMX_FLEXIO=y | |
| 1213 | +CONFIG_MFD_HI6421_PMIC=y | |
| 1214 | +CONFIG_MFD_FP9931=y | |
| 1215 | +CONFIG_MFD_MAX77620=y | |
| 1216 | +CONFIG_MFD_MT6397=y | |
| 1217 | +CONFIG_MFD_RK808=y | |
| 1218 | +CONFIG_MFD_SEC_CORE=y | |
| 1219 | +CONFIG_MFD_SL28CPLD=y | |
| 1220 | +CONFIG_MFD_ROHM_BD718XX=y | |
| 1221 | +CONFIG_MFD_WCD934X=m | |
| 1222 | +CONFIG_REGULATOR_FIXED_VOLTAGE=y | |
| 1223 | +CONFIG_REGULATOR_AXP20X=y | |
| 1224 | +CONFIG_REGULATOR_BD718XX=y | |
| 1225 | +CONFIG_REGULATOR_BD9571MWV=y | |
| 1226 | +CONFIG_REGULATOR_FAN53555=y | |
| 1227 | +CONFIG_REGULATOR_GPIO=y | |
| 1228 | +CONFIG_REGULATOR_HI6421V530=y | |
| 1229 | +CONFIG_REGULATOR_MAX77620=y | |
| 1230 | +CONFIG_REGULATOR_MAX8973=y | |
| 1231 | +CONFIG_REGULATOR_FP9931=y | |
| 1232 | +CONFIG_REGULATOR_MP8859=y | |
| 1233 | +CONFIG_REGULATOR_MT6358=y | |
| 1234 | +CONFIG_REGULATOR_MT6397=y | |
| 1235 | +CONFIG_REGULATOR_PCA9450=y | |
| 1236 | +CONFIG_REGULATOR_PF8X00=y | |
| 1237 | +CONFIG_REGULATOR_PFUZE100=y | |
| 1238 | +CONFIG_REGULATOR_PWM=y | |
| 1239 | +CONFIG_REGULATOR_QCOM_SPMI=y | |
| 1240 | +CONFIG_REGULATOR_RK808=y | |
| 1241 | +CONFIG_REGULATOR_S2MPS11=y | |
| 1242 | +CONFIG_REGULATOR_TPS65132=m | |
| 1243 | +CONFIG_REGULATOR_VCTRL=m | |
| 1244 | +CONFIG_RC_CORE=m | |
| 1245 | +CONFIG_RC_DECODERS=y | |
| 1246 | +CONFIG_IR_IMON_DECODER=m | |
| 1247 | +CONFIG_IR_JVC_DECODER=m | |
| 1248 | +CONFIG_IR_MCE_KBD_DECODER=m | |
| 1249 | +CONFIG_IR_NEC_DECODER=m | |
| 1250 | +CONFIG_IR_RC5_DECODER=m | |
| 1251 | +CONFIG_IR_RC6_DECODER=m | |
| 1252 | +CONFIG_IR_RCMM_DECODER=m | |
| 1253 | +CONFIG_IR_SANYO_DECODER=m | |
| 1254 | +CONFIG_IR_SHARP_DECODER=m | |
| 1255 | +CONFIG_IR_SONY_DECODER=m | |
| 1256 | +CONFIG_IR_XMP_DECODER=m | |
| 1257 | +CONFIG_RC_DEVICES=y | |
| 1258 | +CONFIG_IR_GPIO_CIR=m | |
| 1259 | +CONFIG_MEDIA_SUPPORT=y | |
| f77a70 | 1260 | +CONFIG_MEDIA_SUPPORT_FILTER=y |
| 7d0d56 | 1261 | +CONFIG_MEDIA_CAMERA_SUPPORT=y |
| W | 1262 | +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y |
| 1263 | +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y | |
| 1264 | +CONFIG_MEDIA_SDR_SUPPORT=y | |
| 1265 | +CONFIG_MEDIA_PLATFORM_SUPPORT=y | |
| 1266 | +# CONFIG_DVB_NET is not set | |
| 1267 | +CONFIG_MEDIA_USB_SUPPORT=y | |
| 1268 | +CONFIG_USB_VIDEO_CLASS=m | |
| 1269 | +CONFIG_V4L_PLATFORM_DRIVERS=y | |
| 1270 | +CONFIG_SDR_PLATFORM_DRIVERS=y | |
| 1271 | +CONFIG_V4L_MEM2MEM_DRIVERS=y | |
| 1272 | +CONFIG_VIDEO_MX8_CAPTURE=y | |
| 1273 | +CONFIG_VIDEO_MXC_CAPTURE=y | |
| 1274 | +CONFIG_VIDEO_MXC_CSI_CAMERA=y | |
| 1275 | +CONFIG_MXC_MIPI_CSI=y | |
| 1276 | +CONFIG_MXC_CAMERA_OV5640_MIPI_V2=y | |
| 1277 | +CONFIG_VIDEO_AMPHION_VPU=y | |
| 1278 | +CONFIG_VIDEO_IMX8_JPEG=m | |
| 1279 | +CONFIG_VIDEO_HANTRO=m | |
| 1280 | +CONFIG_VIDEO_IMX219=m | |
| 1281 | +CONFIG_VIDEO_OV5640=y | |
| 1282 | +CONFIG_VIDEO_OV5645=m | |
| 1283 | +CONFIG_VIDEO_AP1302=y | |
| 1284 | +CONFIG_VIDEO_MT9M114=y | |
| 1285 | +CONFIG_IMX_DPU_CORE=y | |
| 1286 | +CONFIG_IMX8MM_LCDIF_CORE=y | |
| 1287 | +CONFIG_IMX_LCDIFV3_CORE=y | |
| 1288 | +CONFIG_DRM=y | |
| 1289 | +CONFIG_DRM_I2C_NXP_TDA998X=m | |
| 1290 | +CONFIG_DRM_MALI_DISPLAY=m | |
| 1291 | +CONFIG_DRM_NOUVEAU=m | |
| 1292 | +CONFIG_DRM_RCAR_DW_HDMI=m | |
| 1293 | +CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m | |
| 1294 | +CONFIG_DRM_PANEL_LVDS=m | |
| 1295 | +CONFIG_DRM_PANEL_SIMPLE=y | |
| 1296 | +CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m | |
| 1297 | +CONFIG_DRM_PANEL_RAYDIUM_RM67191=y | |
| 1298 | +CONFIG_DRM_PANEL_RAYDIUM_RM68200=y | |
| 1299 | +CONFIG_DRM_PANEL_ROCKTECK_HIMAX8394F=y | |
| 1300 | +CONFIG_DRM_PANEL_SEIKO_43WVF1G=y | |
| 1301 | +CONFIG_DRM_PANEL_SITRONIX_ST7703=m | |
| 1302 | +CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m | |
| 1303 | +CONFIG_DRM_PANEL_WKS_101WX001=y | |
| 1304 | +CONFIG_DRM_DISPLAY_CONNECTOR=m | |
| 1305 | +CONFIG_DRM_LONTIUM_LT8912B=m | |
| 1306 | +CONFIG_DRM_LONTIUM_LT9611=m | |
| 1307 | +CONFIG_DRM_LONTIUM_LT9611UXC=m | |
| 1308 | +CONFIG_DRM_FSL_IMX_LVDS_BRIDGE=y | |
| 1309 | +CONFIG_DRM_NWL_MIPI_DSI=y | |
| 1310 | +CONFIG_DRM_NXP_SEIKO_43WVFIG=y | |
| 1311 | +CONFIG_DRM_PARADE_PS8640=m | |
| 1312 | +CONFIG_DRM_SII902X=m | |
| 1313 | +CONFIG_DRM_SIMPLE_BRIDGE=m | |
| 1314 | +CONFIG_DRM_THINE_THC63LVD1024=m | |
| 1315 | +CONFIG_DRM_TI_SN65DSI86=m | |
| 1316 | +CONFIG_DRM_I2C_ADV7511=y | |
| 1317 | +CONFIG_DRM_I2C_ADV7511_AUDIO=y | |
| 1318 | +CONFIG_DRM_DW_HDMI_AHB_AUDIO=m | |
| 1319 | +CONFIG_DRM_DW_HDMI_I2S_AUDIO=m | |
| 1320 | +CONFIG_DRM_DW_HDMI_GP_AUDIO=y | |
| 1321 | +CONFIG_DRM_DW_HDMI_CEC=m | |
| 1322 | +CONFIG_DRM_ITE_IT6263=y | |
| 1323 | +CONFIG_DRM_ITE_IT6161=y | |
| 1324 | +CONFIG_DRM_IMX=y | |
| 1325 | +CONFIG_DRM_IMX_LCDIF_MUX_DISPLAY=y | |
| 1326 | +CONFIG_DRM_IMX_PARALLEL_DISPLAY=y | |
| 1327 | +CONFIG_DRM_IMX_TVE=y | |
| 1328 | +CONFIG_DRM_IMX_LDB=y | |
| 1329 | +CONFIG_DRM_IMX8QM_LDB=y | |
| 1330 | +CONFIG_DRM_IMX8QXP_LDB=y | |
| 1331 | +CONFIG_DRM_IMX8MP_LDB=y | |
| 1332 | +CONFIG_DRM_IMX93_LDB=y | |
| 1333 | +CONFIG_DRM_IMX_DW_MIPI_DSI=y | |
| 1334 | +CONFIG_DRM_IMX93_PARALLEL_DISPLAY_FORMAT=y | |
| 1335 | +CONFIG_DRM_IMX_HDMI=y | |
| 1336 | +CONFIG_DRM_IMX_SEC_DSIM=y | |
| 1337 | +CONFIG_DRM_IMX_DCNANO=y | |
| 1338 | +CONFIG_DRM_IMX_DCSS=y | |
| 1339 | +CONFIG_DRM_IMX_CDNS_MHDP=y | |
| 1340 | +CONFIG_DRM_ETNAVIV=m | |
| 1341 | +CONFIG_DRM_HISI_HIBMC=m | |
| 1342 | +CONFIG_DRM_HISI_KIRIN=m | |
| 1343 | +CONFIG_DRM_MXSFB=y | |
| 1344 | +CONFIG_DRM_PL111=m | |
| 1345 | +CONFIG_DRM_LIMA=m | |
| 1346 | +CONFIG_DRM_PANFROST=m | |
| 1347 | +CONFIG_FB=y | |
| 1348 | +CONFIG_FB_ARMCLCD=y | |
| 1349 | +CONFIG_FB_EFI=y | |
| 1350 | +CONFIG_FB_MXC_EINK_V2_PANEL=y | |
| 1351 | +CONFIG_BACKLIGHT_PWM=y | |
| 1352 | +CONFIG_BACKLIGHT_LP855X=m | |
| 1353 | +CONFIG_BACKLIGHT_GPIO=y | |
| f77a70 | 1354 | +CONFIG_FRAMEBUFFER_CONSOLE=y |
| 7d0d56 | 1355 | +CONFIG_LOGO=y |
| W | 1356 | +# CONFIG_LOGO_LINUX_MONO is not set |
| 1357 | +# CONFIG_LOGO_LINUX_VGA16 is not set | |
| 1358 | +CONFIG_SOUND=y | |
| 1359 | +CONFIG_SND=y | |
| 1360 | +CONFIG_SND_ALOOP=m | |
| 1361 | +CONFIG_SND_USB_AUDIO=m | |
| 1362 | +CONFIG_SND_SOC=y | |
| 1363 | +CONFIG_SND_SOC_FSL_ASRC=m | |
| 1364 | +CONFIG_SND_SOC_FSL_MQS=m | |
| 1365 | +CONFIG_SND_SOC_FSL_MICFIL=m | |
| 1366 | +CONFIG_SND_SOC_FSL_EASRC=m | |
| 1367 | +CONFIG_SND_SOC_FSL_XCVR=m | |
| 1368 | +CONFIG_SND_SOC_FSL_ESAI_CLIENT=y | |
| 1369 | +CONFIG_SND_SOC_FSL_RPMSG=m | |
| 1370 | +CONFIG_SND_IMX_SOC=m | |
| 1371 | +CONFIG_SND_SOC_IMX_SGTL5000=m | |
| 1372 | +CONFIG_SND_SOC_IMX_SPDIF=m | |
| 1373 | +CONFIG_SND_SOC_FSL_ASOC_CARD=m | |
| 1374 | +CONFIG_SND_SOC_IMX_AUDMIX=m | |
| 1375 | +CONFIG_SND_SOC_IMX_HDMI=m | |
| 1376 | +CONFIG_SND_SOC_IMX_CARD=m | |
| 1377 | +CONFIG_SND_SOC_IMX_PCM512X=m | |
| 1378 | +CONFIG_SND_SOC_SOF_TOPLEVEL=y | |
| 1379 | +CONFIG_SND_SOC_SOF_OF=m | |
| 1380 | +CONFIG_SND_SOC_SOF_IMX_TOPLEVEL=y | |
| 1381 | +CONFIG_SND_SOC_SOF_IMX8=m | |
| 1382 | +CONFIG_SND_SOC_SOF_IMX8M=m | |
| 1383 | +CONFIG_SND_SOC_SOF_IMX8ULP=m | |
| 1384 | +CONFIG_SND_SOC_AK4613=m | |
| 1385 | +CONFIG_SND_SOC_BT_SCO=y | |
| 1386 | +CONFIG_SND_SOC_CROS_EC_CODEC=m | |
| 1387 | +CONFIG_SND_SOC_CS42XX8_I2C=y | |
| 1388 | +CONFIG_SND_SOC_DMIC=m | |
| 1389 | +CONFIG_SND_SOC_ES7134=m | |
| 1390 | +CONFIG_SND_SOC_ES7241=m | |
| 1391 | +CONFIG_SND_SOC_GTM601=m | |
| 1392 | +CONFIG_SND_SOC_MAX98357A=m | |
| 1393 | +CONFIG_SND_SOC_MAX98927=m | |
| 1394 | +CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m | |
| 1395 | +CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m | |
| 1396 | +CONFIG_SND_SOC_PCM3168A_I2C=m | |
| 1397 | +CONFIG_SND_SOC_RT5659=m | |
| 1398 | +CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m | |
| 1399 | +CONFIG_SND_SOC_SIMPLE_MUX=m | |
| 1400 | +CONFIG_SND_SOC_SPDIF=m | |
| 1401 | +CONFIG_SND_SOC_TAS571X=m | |
| 1402 | +CONFIG_SND_SOC_WCD934X=m | |
| 1403 | +CONFIG_SND_SOC_WM8524=y | |
| 1404 | +CONFIG_SND_SOC_WM8904=m | |
| 1405 | +CONFIG_SND_SOC_WM8960=m | |
| 1406 | +CONFIG_SND_SOC_WM8962=m | |
| 1407 | +CONFIG_SND_SOC_WSA881X=m | |
| 1408 | +CONFIG_SND_SOC_RPMSG_WM8960=m | |
| 1409 | +CONFIG_SND_SOC_RPMSG_AK4497=m | |
| 1410 | +CONFIG_SND_SOC_LPASS_WSA_MACRO=m | |
| 1411 | +CONFIG_SND_SOC_LPASS_VA_MACRO=m | |
| 1412 | +CONFIG_SND_SIMPLE_CARD=y | |
| 1413 | +CONFIG_SND_AUDIO_GRAPH_CARD=y | |
| f77a70 | 1414 | +CONFIG_HID_A4TECH=y |
| G | 1415 | +CONFIG_HID_APPLE=y |
| 1416 | +CONFIG_HID_BELKIN=y | |
| 1417 | +CONFIG_HID_CHERRY=y | |
| 1418 | +CONFIG_HID_CHICONY=y | |
| 1419 | +CONFIG_HID_CYPRESS=y | |
| 1420 | +CONFIG_HID_EZKEY=y | |
| 1421 | +CONFIG_HID_ITE=y | |
| 1422 | +CONFIG_HID_KENSINGTON=y | |
| 1423 | +CONFIG_HID_LOGITECH=y | |
| 1424 | +CONFIG_HID_REDRAGON=y | |
| 1425 | +CONFIG_HID_MICROSOFT=y | |
| 1426 | +CONFIG_HID_MONTEREY=y | |
| 7d0d56 | 1427 | +CONFIG_HID_MULTITOUCH=m |
| W | 1428 | +CONFIG_I2C_HID_ACPI=m |
| 1429 | +CONFIG_I2C_HID_OF=m | |
| 1430 | +CONFIG_USB_CONN_GPIO=y | |
| 1431 | +CONFIG_USB=y | |
| 1432 | +CONFIG_USB_OTG=y | |
| 1433 | +CONFIG_USB_XHCI_HCD=y | |
| 1434 | +CONFIG_USB_XHCI_PCI_RENESAS=m | |
| 1435 | +CONFIG_USB_EHCI_HCD=y | |
| 1436 | +CONFIG_USB_EHCI_HCD_PLATFORM=y | |
| 1437 | +CONFIG_USB_OHCI_HCD=y | |
| 1438 | +CONFIG_USB_OHCI_HCD_PLATFORM=y | |
| 1439 | +CONFIG_USB_HCD_TEST_MODE=y | |
| 1440 | +CONFIG_USB_ACM=m | |
| 1441 | +CONFIG_USB_STORAGE=y | |
| 1442 | +CONFIG_USB_UAS=y | |
| 1443 | +CONFIG_USB_CDNS_SUPPORT=y | |
| 1444 | +CONFIG_USB_CDNS3=y | |
| 1445 | +CONFIG_USB_CDNS3_GADGET=y | |
| 1446 | +CONFIG_USB_CDNS3_HOST=y | |
| 1447 | +CONFIG_USB_MUSB_HDRC=y | |
| 1448 | +CONFIG_USB_DWC3=y | |
| 1449 | +CONFIG_USB_DWC2=y | |
| 1450 | +CONFIG_USB_CHIPIDEA=y | |
| 1451 | +CONFIG_USB_CHIPIDEA_UDC=y | |
| 1452 | +CONFIG_USB_CHIPIDEA_HOST=y | |
| 1453 | +CONFIG_USB_ISP1760=y | |
| 1454 | +CONFIG_USB_SERIAL=y | |
| 1455 | +CONFIG_USB_SERIAL_CONSOLE=y | |
| 1456 | +CONFIG_USB_SERIAL_GENERIC=y | |
| 1457 | +CONFIG_USB_SERIAL_SIMPLE=y | |
| 1458 | +CONFIG_USB_SERIAL_CP210X=m | |
| 1459 | +CONFIG_USB_SERIAL_FTDI_SIO=y | |
| 1460 | +CONFIG_USB_SERIAL_OPTION=m | |
| 1461 | +CONFIG_USB_TEST=m | |
| 1462 | +CONFIG_USB_EHSET_TEST_FIXTURE=y | |
| 1463 | +CONFIG_USB_HSIC_USB3503=y | |
| 1464 | +CONFIG_NOP_USB_XCEIV=y | |
| 1465 | +CONFIG_USB_MXS_PHY=y | |
| 1466 | +CONFIG_USB_ULPI=y | |
| 1467 | +CONFIG_USB_GADGET=y | |
| 1468 | +CONFIG_USB_SNP_UDC_PLAT=y | |
| 1469 | +CONFIG_USB_BDC_UDC=y | |
| 1470 | +CONFIG_USB_CONFIGFS=y | |
| 1471 | +CONFIG_USB_CONFIGFS_SERIAL=y | |
| 1472 | +CONFIG_USB_CONFIGFS_ACM=y | |
| 1473 | +CONFIG_USB_CONFIGFS_OBEX=y | |
| 1474 | +CONFIG_USB_CONFIGFS_NCM=y | |
| 1475 | +CONFIG_USB_CONFIGFS_ECM=y | |
| 1476 | +CONFIG_USB_CONFIGFS_ECM_SUBSET=y | |
| 1477 | +CONFIG_USB_CONFIGFS_RNDIS=y | |
| 1478 | +CONFIG_USB_CONFIGFS_EEM=y | |
| 1479 | +CONFIG_USB_CONFIGFS_MASS_STORAGE=y | |
| 1480 | +CONFIG_USB_CONFIGFS_F_LB_SS=y | |
| 1481 | +CONFIG_USB_CONFIGFS_F_FS=y | |
| 1482 | +CONFIG_USB_CONFIGFS_F_UAC1=y | |
| 1483 | +CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y | |
| 1484 | +CONFIG_USB_CONFIGFS_F_UAC2=y | |
| 1485 | +CONFIG_USB_CONFIGFS_F_MIDI=y | |
| 1486 | +CONFIG_USB_CONFIGFS_F_HID=y | |
| 1487 | +CONFIG_USB_CONFIGFS_F_UVC=y | |
| 1488 | +CONFIG_USB_ZERO=m | |
| 1489 | +CONFIG_USB_AUDIO=m | |
| 1490 | +CONFIG_USB_ETH=m | |
| 1491 | +CONFIG_USB_MASS_STORAGE=m | |
| 1492 | +CONFIG_USB_G_SERIAL=m | |
| 1493 | +CONFIG_TYPEC=y | |
| 1494 | +CONFIG_TYPEC_TCPM=y | |
| 1495 | +CONFIG_TYPEC_TCPCI=y | |
| 1496 | +CONFIG_TYPEC_FUSB302=m | |
| 1497 | +CONFIG_TYPEC_TPS6598X=m | |
| 1498 | +CONFIG_TYPEC_HD3SS3220=m | |
| 1499 | +CONFIG_TYPEC_SWITCH_GPIO=y | |
| 1500 | +CONFIG_MMC=y | |
| 1501 | +CONFIG_MMC_BLOCK_MINORS=32 | |
| 1502 | +CONFIG_MMC_ARMMMCI=y | |
| 1503 | +CONFIG_MMC_SDHCI=y | |
| 1504 | +CONFIG_MMC_SDHCI_ACPI=y | |
| 1505 | +CONFIG_MMC_SDHCI_PLTFM=y | |
| 1506 | +CONFIG_MMC_SDHCI_OF_ARASAN=y | |
| 1507 | +CONFIG_MMC_SDHCI_OF_ESDHC=y | |
| 1508 | +CONFIG_MMC_SDHCI_CADENCE=y | |
| 1509 | +CONFIG_MMC_SDHCI_ESDHC_IMX=y | |
| 1510 | +CONFIG_MMC_SDHCI_F_SDH30=y | |
| 1511 | +CONFIG_MMC_SPI=y | |
| 1512 | +CONFIG_MMC_DW=y | |
| 1513 | +CONFIG_MMC_DW_EXYNOS=y | |
| 1514 | +CONFIG_MMC_DW_HI3798CV200=y | |
| 1515 | +CONFIG_MMC_DW_K3=y | |
| 1516 | +CONFIG_MMC_MTK=y | |
| 1517 | +CONFIG_MMC_SDHCI_XENON=y | |
| 1518 | +CONFIG_MMC_SDHCI_AM654=y | |
| 1519 | +CONFIG_SCSI_UFSHCD=y | |
| 1520 | +CONFIG_SCSI_UFSHCD_PLATFORM=y | |
| 1521 | +CONFIG_NEW_LEDS=y | |
| 1522 | +CONFIG_LEDS_CLASS=y | |
| 1523 | +CONFIG_LEDS_CLASS_MULTICOLOR=m | |
| 1524 | +CONFIG_LEDS_LM3692X=m | |
| 1525 | +CONFIG_LEDS_PCA9532=m | |
| 1526 | +CONFIG_LEDS_GPIO=y | |
| 1527 | +CONFIG_LEDS_PCA995X=m | |
| 1528 | +CONFIG_LEDS_PWM=y | |
| 1529 | +CONFIG_LEDS_SYSCON=y | |
| 1530 | +CONFIG_LEDS_TRIGGER_TIMER=y | |
| 1531 | +CONFIG_LEDS_TRIGGER_DISK=y | |
| 1532 | +CONFIG_LEDS_TRIGGER_HEARTBEAT=y | |
| 1533 | +CONFIG_LEDS_TRIGGER_CPU=y | |
| 1534 | +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | |
| 1535 | +CONFIG_LEDS_TRIGGER_PANIC=y | |
| 1536 | +CONFIG_EDAC=y | |
| 1537 | +CONFIG_EDAC_GHES=y | |
| 1538 | +CONFIG_EDAC_LAYERSCAPE=m | |
| 1539 | +CONFIG_EDAC_SYNOPSYS=y | |
| 1540 | +CONFIG_RTC_CLASS=y | |
| 2b23f8 | 1541 | +CONFIG_RTC_DRV_ISL1208=y |
| 7d0d56 | 1542 | +CONFIG_DMADEVICES=y |
| W | 1543 | +CONFIG_FSL_EDMA=y |
| 1544 | +CONFIG_FSL_QDMA=m | |
| 1545 | +CONFIG_FSL_EDMA_V3=y | |
| 1546 | +CONFIG_IMX_SDMA=y | |
| 1547 | +CONFIG_MV_XOR_V2=y | |
| 1548 | +CONFIG_MXS_DMA=y | |
| 1549 | +CONFIG_MXC_PXP_V3=y | |
| 1550 | +CONFIG_PL330_DMA=y | |
| 1551 | +CONFIG_QCOM_HIDMA_MGMT=y | |
| 1552 | +CONFIG_QCOM_HIDMA=y | |
| 1553 | +CONFIG_DW_EDMA=y | |
| 1554 | +CONFIG_DW_EDMA_PCIE=y | |
| 1555 | +CONFIG_FSL_DPAA2_QDMA=m | |
| 1556 | +CONFIG_DMATEST=y | |
| 1557 | +CONFIG_DMABUF_HEAPS=y | |
| 1558 | +CONFIG_DMABUF_HEAPS_SYSTEM=y | |
| 1559 | +CONFIG_DMABUF_HEAPS_CMA=y | |
| 1560 | +CONFIG_DMABUF_HEAPS_DSP=y | |
| 1561 | +CONFIG_UIO_PCI_GENERIC=y | |
| 1562 | +CONFIG_UIO_IVSHMEM=y | |
| 1563 | +CONFIG_VFIO=y | |
| 1564 | +CONFIG_VFIO_PCI=y | |
| 1565 | +CONFIG_VFIO_FSL_MC=y | |
| 1566 | +CONFIG_VIRTIO_PCI=y | |
| 1567 | +CONFIG_VIRTIO_BALLOON=y | |
| 1568 | +CONFIG_VIRTIO_MMIO=y | |
| 1569 | +CONFIG_VIRTIO_IVSHMEM=y | |
| 1570 | +CONFIG_XEN_GNTDEV=y | |
| 1571 | +CONFIG_XEN_GRANT_DEV_ALLOC=y | |
| 1572 | +CONFIG_STAGING=y | |
| 1573 | +CONFIG_STAGING_MEDIA=y | |
| 1574 | +CONFIG_VIDEO_IMX_CAPTURE=y | |
| 1575 | +CONFIG_IMX8_MEDIA_DEVICE=m | |
| 1576 | +CONFIG_MHDP_HDMIRX=y | |
| 1577 | +CONFIG_MHDP_HDMIRX_CEC=y | |
| 1578 | +CONFIG_FSL_DPAA2=y | |
| 1579 | +CONFIG_FSL_PPFE=y | |
| 1580 | +CONFIG_FSL_PPFE_UTIL_DISABLED=y | |
| 1581 | +CONFIG_ETHOSU=y | |
| 1582 | +CONFIG_CHROME_PLATFORMS=y | |
| 1583 | +CONFIG_CROS_EC=y | |
| 1584 | +CONFIG_CROS_EC_I2C=y | |
| 1585 | +CONFIG_CROS_EC_SPI=y | |
| 1586 | +CONFIG_CROS_EC_CHARDEV=m | |
| 1587 | +CONFIG_CLK_VEXPRESS_OSC=y | |
| 1588 | +CONFIG_COMMON_CLK_RK808=y | |
| 1589 | +CONFIG_COMMON_CLK_SCMI=y | |
| 1590 | +CONFIG_COMMON_CLK_SCPI=y | |
| 1591 | +CONFIG_COMMON_CLK_CS2000_CP=y | |
| 1592 | +CONFIG_COMMON_CLK_FSL_SAI=y | |
| 1593 | +CONFIG_COMMON_CLK_S2MPS11=y | |
| 1594 | +CONFIG_COMMON_CLK_XGENE=y | |
| 1595 | +CONFIG_COMMON_CLK_PWM=y | |
| 1596 | +CONFIG_COMMON_CLK_VC5=y | |
| 1597 | +CONFIG_CLK_IMX8MM=y | |
| 1598 | +CONFIG_CLK_IMX8MN=y | |
| 1599 | +CONFIG_CLK_IMX8MP=y | |
| 1600 | +CONFIG_CLK_IMX8MQ=y | |
| 1601 | +CONFIG_CLK_IMX8QXP=y | |
| 1602 | +CONFIG_CLK_IMX8ULP=y | |
| 1603 | +CONFIG_CLK_IMX93=y | |
| 1604 | +CONFIG_HWSPINLOCK=y | |
| 1605 | +CONFIG_ARM_MHU=y | |
| 1606 | +CONFIG_IMX_MBOX=y | |
| 1607 | +CONFIG_PLATFORM_MHU=y | |
| 1608 | +CONFIG_IOMMU_IO_PGTABLE_ARMV7S=y | |
| 1609 | +CONFIG_ARM_SMMU=y | |
| 1610 | +CONFIG_ARM_SMMU_V3=y | |
| 1611 | +CONFIG_REMOTEPROC=y | |
| 1612 | +CONFIG_IMX_REMOTEPROC=y | |
| 1613 | +CONFIG_IMX_DSP_REMOTEPROC=m | |
| 1614 | +CONFIG_RPMSG_CHAR=m | |
| 1615 | +CONFIG_RPMSG_CTRL=m | |
| 1616 | +CONFIG_RPMSG_QCOM_GLINK_RPM=y | |
| 1617 | +CONFIG_SOUNDWIRE=m | |
| 1618 | +CONFIG_SOUNDWIRE_QCOM=m | |
| 1619 | +CONFIG_SOC_BRCMSTB=y | |
| 1620 | +CONFIG_FSL_DPAA=y | |
| 1621 | +CONFIG_FSL_MC_DPIO=y | |
| 1622 | +CONFIG_FSL_RCPM=y | |
| 1623 | +CONFIG_FSL_QIXIS=y | |
| 1624 | +CONFIG_SOC_TI=y | |
| 1625 | +CONFIG_EXTCON_PTN5150=m | |
| 1626 | +CONFIG_EXTCON_USB_GPIO=y | |
| 1627 | +CONFIG_EXTCON_USBC_CROS_EC=y | |
| 1628 | +CONFIG_IIO=y | |
| 1629 | +CONFIG_FXLS8962AF_I2C=m | |
| 1630 | +CONFIG_IIO_ST_ACCEL_3AXIS=m | |
| 1631 | +CONFIG_IMX8QXP_ADC=y | |
| 1632 | +CONFIG_IMX93_ADC=y | |
| 1633 | +CONFIG_MAX9611=m | |
| 1634 | +CONFIG_QCOM_SPMI_VADC=m | |
| 1635 | +CONFIG_QCOM_SPMI_ADC5=m | |
| 1636 | +CONFIG_IIO_CROS_EC_SENSORS_CORE=m | |
| 1637 | +CONFIG_IIO_CROS_EC_SENSORS=m | |
| 2b23f8 | 1638 | +CONFIG_BMG160=m |
| 7d0d56 | 1639 | +CONFIG_IIO_ST_GYRO_3AXIS=m |
| 2b23f8 | 1640 | +CONFIG_MAX30100=m |
| G | 1641 | +CONFIG_MAX30102=m |
| 1642 | +CONFIG_DHT11=y | |
| 1643 | +CONFIG_HDC100X=y | |
| 1644 | +CONFIG_HTS221=y | |
| 7d0d56 | 1645 | +CONFIG_FXOS8700_I2C=y |
| W | 1646 | +CONFIG_RPMSG_IIO_PEDOMETER=m |
| 1647 | +CONFIG_INV_MPU6050_I2C=m | |
| 1648 | +CONFIG_IIO_ST_LSM6DSX=y | |
| 1649 | +CONFIG_SENSORS_ISL29018=y | |
| 1650 | +CONFIG_IIO_ST_MAGN_3AXIS=m | |
| 1651 | +CONFIG_IIO_CROS_EC_BARO=m | |
| 1652 | +CONFIG_MPL3115=y | |
| 1653 | +CONFIG_MS5611=m | |
| 1654 | +CONFIG_MS5611_I2C=m | |
| 1655 | +CONFIG_PWM=y | |
| 1656 | +CONFIG_PWM_ADP5585=y | |
| 1657 | +CONFIG_PWM_CROS_EC=m | |
| 1658 | +CONFIG_PWM_FSL_FTM=m | |
| 1659 | +CONFIG_PWM_IMX27=y | |
| 1660 | +CONFIG_PWM_RPCHIP=y | |
| 1661 | +CONFIG_PWM_SL28CPLD=m | |
| 1662 | +CONFIG_SL28CPLD_INTC=y | |
| 1663 | +CONFIG_RESET_IMX7=y | |
| 1664 | +CONFIG_RESET_IMX8ULP_SIM=y | |
| 1665 | +CONFIG_PHY_XGENE=y | |
| 1666 | +CONFIG_PHY_MIXEL_LVDS=y | |
| 1667 | +CONFIG_PHY_MIXEL_LVDS_COMBO=y | |
| 1668 | +CONFIG_PHY_CADENCE_SALVO=y | |
| 1669 | +CONFIG_PHY_FSL_IMX8MP_LVDS=y | |
| 1670 | +CONFIG_PHY_FSL_IMX93_MIPI_DPHY=y | |
| 1671 | +CONFIG_PHY_MIXEL_MIPI_DPHY=y | |
| 1672 | +CONFIG_PHY_FSL_IMX8M_PCIE=y | |
| 1673 | +CONFIG_PHY_FSL_IMX8Q_PCIE=y | |
| 1674 | +CONFIG_PHY_SAMSUNG_HDMI_PHY=y | |
| 1675 | +CONFIG_PHY_QCOM_USB_HS=y | |
| 1676 | +CONFIG_PHY_SAMSUNG_USB2=y | |
| 1677 | +CONFIG_ARM_CCI_PMU=m | |
| 1678 | +CONFIG_ARM_CCN=m | |
| 1679 | +CONFIG_ARM_CMN=m | |
| 1680 | +CONFIG_ARM_SMMU_V3_PMU=m | |
| 1681 | +CONFIG_ARM_DSU_PMU=m | |
| 1682 | +CONFIG_FSL_IMX8_DDR_PMU=y | |
| 1683 | +CONFIG_FSL_IMX9_DDR_PMU=y | |
| 1684 | +CONFIG_ARM_SPE_PMU=m | |
| 1685 | +CONFIG_ARM_DMC620_PMU=m | |
| 1686 | +CONFIG_HISI_PMU=y | |
| 1687 | +CONFIG_NVMEM_IMX_OCOTP=y | |
| 1688 | +CONFIG_NVMEM_IMX_OCOTP_SCU=y | |
| 1689 | +CONFIG_NVMEM_RMEM=m | |
| 1690 | +CONFIG_FPGA=y | |
| 1691 | +CONFIG_FPGA_BRIDGE=m | |
| 1692 | +CONFIG_ALTERA_FREEZE_BRIDGE=m | |
| 1693 | +CONFIG_FPGA_REGION=m | |
| 1694 | +CONFIG_OF_FPGA_REGION=m | |
| 1695 | +CONFIG_TEE=y | |
| 1696 | +CONFIG_OPTEE=y | |
| 1697 | +CONFIG_MUX_MMIO=y | |
| 1698 | +CONFIG_SLIM_QCOM_CTRL=m | |
| 1699 | +CONFIG_MXC_SIM=y | |
| 1700 | +CONFIG_MXC_GPU_VIV=y | |
| 1701 | +CONFIG_MXC_EMVSIM=y | |
| 1702 | +CONFIG_EXT2_FS=y | |
| 1703 | +CONFIG_EXT3_FS=y | |
| 1704 | +CONFIG_EXT4_FS_POSIX_ACL=y | |
| 1705 | +CONFIG_FANOTIFY=y | |
| 1706 | +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y | |
| 1707 | +CONFIG_QUOTA=y | |
| 1708 | +CONFIG_AUTOFS4_FS=y | |
| 1709 | +CONFIG_FUSE_FS=m | |
| 1710 | +CONFIG_CUSE=m | |
| 1711 | +CONFIG_OVERLAY_FS=m | |
| 1712 | +CONFIG_VFAT_FS=y | |
| f77a70 | 1713 | +CONFIG_EXFAT_FS=y |
| G | 1714 | +CONFIG_NTFS_FS=y |
| 1715 | +CONFIG_NTFS_RW=y | |
| 1716 | +CONFIG_NTFS3_FS=y | |
| 1717 | +CONFIG_NTFS3_64BIT_CLUSTER=y | |
| 1718 | +CONFIG_NTFS3_LZX_XPRESS=y | |
| 1719 | +CONFIG_NTFS3_FS_POSIX_ACL=y | |
| 7d0d56 | 1720 | +CONFIG_TMPFS_POSIX_ACL=y |
| W | 1721 | +CONFIG_HUGETLBFS=y |
| 1722 | +CONFIG_EFIVAR_FS=y | |
| 1723 | +CONFIG_JFFS2_FS=y | |
| 1724 | +CONFIG_NFS_FS=y | |
| 1725 | +CONFIG_NFS_V4=y | |
| 1726 | +CONFIG_NFS_V4_1=y | |
| 1727 | +CONFIG_NFS_V4_2=y | |
| 1728 | +CONFIG_ROOT_NFS=y | |
| 1729 | +CONFIG_NLS_CODEPAGE_437=y | |
| f77a70 | 1730 | +CONFIG_NLS_CODEPAGE_936=y |
| G | 1731 | +CONFIG_NLS_CODEPAGE_950=y |
| 1732 | +CONFIG_NLS_CODEPAGE_874=y | |
| 7d0d56 | 1733 | +CONFIG_NLS_ISO8859_1=y |
| f77a70 | 1734 | +CONFIG_NLS_UTF8=y |
| 7d0d56 | 1735 | +CONFIG_TRUSTED_KEYS=m |
| W | 1736 | +# CONFIG_TRUSTED_KEYS_TPM is not set |
| 1737 | +# CONFIG_TRUSTED_KEYS_TEE is not set | |
| 1738 | +CONFIG_SECURITY=y | |
| 1739 | +CONFIG_CRYPTO_USER=y | |
| 1740 | +CONFIG_CRYPTO_TEST=m | |
| 1741 | +CONFIG_CRYPTO_ANUBIS=m | |
| 1742 | +CONFIG_CRYPTO_ARIA=m | |
| 1743 | +CONFIG_CRYPTO_BLOWFISH=m | |
| 1744 | +CONFIG_CRYPTO_CAMELLIA=m | |
| 1745 | +CONFIG_CRYPTO_CAST5=m | |
| 1746 | +CONFIG_CRYPTO_CAST6=m | |
| 1747 | +CONFIG_CRYPTO_FCRYPT=m | |
| 1748 | +CONFIG_CRYPTO_KHAZAD=m | |
| 1749 | +CONFIG_CRYPTO_SEED=m | |
| 1750 | +CONFIG_CRYPTO_SERPENT=m | |
| 1751 | +CONFIG_CRYPTO_TEA=m | |
| 1752 | +CONFIG_CRYPTO_TWOFISH=m | |
| 1753 | +CONFIG_CRYPTO_ARC4=m | |
| 1754 | +CONFIG_CRYPTO_CFB=m | |
| 1755 | +CONFIG_CRYPTO_CTS=m | |
| 1756 | +CONFIG_CRYPTO_LRW=m | |
| 1757 | +CONFIG_CRYPTO_OFB=m | |
| 1758 | +CONFIG_CRYPTO_PCBC=m | |
| 1759 | +CONFIG_CRYPTO_CHACHA20POLY1305=m | |
| 1760 | +CONFIG_CRYPTO_ECHAINIV=y | |
| 1761 | +CONFIG_CRYPTO_TLS=m | |
| f77a70 | 1762 | +CONFIG_CRYPTO_BLAKE2B=m |
| 7d0d56 | 1763 | +CONFIG_CRYPTO_MD4=m |
| W | 1764 | +CONFIG_CRYPTO_RMD160=m |
| 1765 | +CONFIG_CRYPTO_STREEBOG=m | |
| 1766 | +CONFIG_CRYPTO_VMAC=m | |
| 1767 | +CONFIG_CRYPTO_WP512=m | |
| 1768 | +CONFIG_CRYPTO_XCBC=m | |
| f77a70 | 1769 | +CONFIG_CRYPTO_XXHASH=m |
| G | 1770 | +CONFIG_CRYPTO_LZO=y |
| 1771 | +CONFIG_CRYPTO_ZSTD=y | |
| 7d0d56 | 1772 | +CONFIG_CRYPTO_ANSI_CPRNG=y |
| W | 1773 | +CONFIG_CRYPTO_USER_API_HASH=m |
| 1774 | +CONFIG_CRYPTO_USER_API_SKCIPHER=m | |
| 1775 | +CONFIG_CRYPTO_USER_API_RNG=m | |
| 1776 | +CONFIG_CRYPTO_USER_API_AEAD=m | |
| 1777 | +CONFIG_CRYPTO_CHACHA20_NEON=m | |
| 1778 | +CONFIG_CRYPTO_GHASH_ARM64_CE=y | |
| 1779 | +CONFIG_CRYPTO_SHA1_ARM64_CE=y | |
| 1780 | +CONFIG_CRYPTO_SHA2_ARM64_CE=y | |
| 1781 | +CONFIG_CRYPTO_SHA512_ARM64_CE=m | |
| 1782 | +CONFIG_CRYPTO_SHA3_ARM64=m | |
| 1783 | +CONFIG_CRYPTO_SM3_ARM64_CE=m | |
| 1784 | +CONFIG_CRYPTO_POLYVAL_ARM64_CE=m | |
| 1785 | +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y | |
| 1786 | +CONFIG_CRYPTO_AES_ARM64_BS=m | |
| 1787 | +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y | |
| 1788 | +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m | |
| 1789 | +CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=m | |
| 1790 | +CONFIG_CRYPTO_DEV_FSL_CAAM=m | |
| 1791 | +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m | |
| 1792 | +CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m | |
| 1793 | +CONFIG_CRYPTO_DEV_CCREE=m | |
| 1794 | +CONFIG_CRYPTO_DEV_HISI_SEC2=m | |
| 1795 | +CONFIG_CRYPTO_DEV_HISI_ZIP=m | |
| 1796 | +CONFIG_CRYPTO_DEV_HISI_HPRE=m | |
| 1797 | +CONFIG_CRYPTO_DEV_HISI_TRNG=m | |
| 1798 | +CONFIG_CRYPTO_DEV_AMLOGIC_GXL=m | |
| 1799 | +CONFIG_INDIRECT_PIO=y | |
| 1800 | +CONFIG_CRC_CCITT=m | |
| 1801 | +CONFIG_CRC8=y | |
| 1802 | +CONFIG_CMA_SIZE_MBYTES=32 | |
| 1803 | +CONFIG_PRINTK_TIME=y | |
| 1804 | +CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y | |
| 1805 | +CONFIG_DEBUG_INFO_REDUCED=y | |
| 1806 | +CONFIG_MAGIC_SYSRQ=y | |
| 1807 | +CONFIG_DEBUG_FS=y | |
| 1808 | +# CONFIG_SCHED_DEBUG is not set | |
| 1809 | +# CONFIG_DEBUG_PREEMPT is not set | |
| 1810 | +# CONFIG_FTRACE is not set | |
| 1811 | +CONFIG_CORESIGHT=y | |
| 1812 | +CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y | |
| 1813 | +CONFIG_CORESIGHT_CATU=m | |
| 1814 | +CONFIG_CORESIGHT_SINK_TPIU=m | |
| 1815 | +CONFIG_CORESIGHT_SINK_ETBV10=m | |
| 1816 | +CONFIG_CORESIGHT_SOURCE_ETM4X=y | |
| 1817 | +CONFIG_CORESIGHT_STM=m | |
| 1818 | +CONFIG_CORESIGHT_CPU_DEBUG=m | |
| 1819 | +CONFIG_CORESIGHT_CTI=m | |
| 1820 | +CONFIG_MEMTEST=y | |
