build-imxboard.git

PATCH:IGKBoard-IMX6ULL: Update linux kernel patch for LCD display

guowenxue

2024-06-20 705df3d275a71294406940f48dffbe05d3d5edb9

commit \| author \| age
d80f34	1	diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
G	2	index 30408b4b2..80faa210e 100644
	3	--- a/arch/arm/boot/dts/Makefile
	4	+++ b/arch/arm/boot/dts/Makefile
	5	@@ -1749,3 +1749,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
	6	aspeed-bmc-vegman-n110.dtb \
	7	aspeed-bmc-vegman-rx20.dtb \
	8	aspeed-bmc-vegman-sx20.dtb
	9	+
	10	+DTC_FLAGS_igkboard-imx6ull := -@
	11	+dtb-$(CONFIG_SOC_IMX6UL) += igkboard-imx6ull.dtb
	12	+subdir-$(CONFIG_SOC_IMX6UL) += igkboard-imx6ull
	13	diff --git a/arch/arm/boot/dts/igkboard-imx6ull.dts b/arch/arm/boot/dts/igkboard-imx6ull.dts
	14	new file mode 100644
	15	index 000000000..ef885fed2
	16	--- /dev/null
	17	+++ b/arch/arm/boot/dts/igkboard-imx6ull.dts
	18	@@ -0,0 +1,604 @@
	19	+/*
	20	+ * Device Tree Source for LingYun IGKBoard-IMX6ULL(IoT Gateway Kit Board based on i.MX6ULL)
	21	+ * Based on imx6ul-14x14-evk.dts/imx6ul-14x14-evk.dtsi
	22	+ *
	23	+ * Copyright (C) 2022 LingYun IoT System Studio.
	24	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	25	+ */
	26	+
	27	+/dts-v1/;
	28	+
	29	+#include "imx6ull.dtsi"
	30	+
	31	+/ {
	32	+ model = "LingYun IoT System Studio IoT Gateway Kits Board Based on i.MX6ULL";
	33	+ compatible = "lingyun,igkboard-imx6ull", "fsl,imx6ull";
	34	+
	35	+ chosen {
	36	+ stdout-path = &uart1;
	37	+ };
	38	+
	39	+ memory@80000000 {
	40	+ device_type = "memory";
	41	+ reg = <0x80000000 0x20000000>;
	42	+ };
	43	+
	44	+ reserved-memory {
	45	+ #address-cells = <1>;
	46	+ #size-cells = <1>;
	47	+ ranges;
	48	+
	49	+ linux,cma {
	50	+ compatible = "shared-dma-pool";
	51	+ reusable;
	52	+ size = <0xa000000>;
	53	+ linux,cma-default;
	54	+ };
	55	+ };
	56	+
	57	+ buzzer: pwm-buzzer {
	58	+ compatible = "pwm-beeper";
	59	+ pwms = <&pwm2 0 500000>;
	60	+ status = "okay";
	61	+ };
	62	+
	63	+ leds {
	64	+ compatible = "gpio-leds";
	65	+ pinctrl-names = "default";
	66	+ pinctrl-0 = <&pinctrl_gpio_leds>;
	67	+ status = "okay";
	68	+
	69	+ sysled {
	70	+ lable = "sysled";
	71	+ gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
	72	+ linux,default-trigger = "heartbeat";
	73	+ default-state = "off";
	74	+ };
	75	+ };
	76	+
	77	+ keys {
	78	+ compatible = "gpio-keys";
	79	+ pinctrl-names = "default";
	80	+ pinctrl-0 = <&pinctrl_gpio_keys>;
	81	+ autorepeat;
	82	+ status = "okay";
	83	+
	84	+ key_user {
	85	+ lable = "key_user";
	86	+ gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
	87	+ linux,code = <KEY_ENTER>;
	88	+ };
	89	+ };
	90	+
	91	+ pxp_v4l2 {
	92	+ compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
	93	+ status = "okay";
	94	+ };
	95	+
	96	+ reg_sd1_vmmc: regulator-sd1-vmmc {
	97	+ compatible = "regulator-fixed";
	98	+ regulator-name = "VSD_3V3";
	99	+ regulator-min-microvolt = <3300000>;
	100	+ regulator-max-microvolt = <3300000>;
	101	+ gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
	102	+ off-on-delay-us = <20000>;
	103	+ enable-active-high;
	104	+ };
	105	+
	106	+ reg_peri_3v3: regulator-peri-3v3 {
	107	+ compatible = "regulator-fixed";
	108	+ regulator-name = "VPERI_3V3";
	109	+ regulator-min-microvolt = <3300000>;
	110	+ regulator-max-microvolt = <3300000>;
	111	+ /*
	112	+ * If you want to want to make this dynamic please
	113	+ * check schematics and test all affected peripherals:
	114	+ *
	115	+ * - sensors
	116	+ * - ethernet phy
	117	+ * - can
	118	+ * - bluetooth
	119	+ * - wm8960 audio codec
	120	+ * - ov5640 camera
	121	+ */
	122	+ regulator-always-on;
	123	+ };
	124	+
	125	+ reg_can_3v3: regulator@0 {
	126	+ compatible = "regulator-fixed";
	127	+ regulator-name = "can-3v3";
	128	+ regulator-min-microvolt = <3300000>;
	129	+ regulator-max-microvolt = <3300000>;
	130	+ regulator-boot-on;
	131	+ regulator-always-on;
	132	+ };
	133	+
	134	+ reg_3p3v: 3p3v {
	135	+ compatible = "regulator-fixed";
	136	+ regulator-name = "3P3V";
	137	+ regulator-min-microvolt = <3300000>;
	138	+ regulator-max-microvolt = <3300000>;
	139	+ regulator-boot-on;
	140	+ regulator-always-on;
	141	+ };
	142	+
	143	+ reg_1p8v: 1p8v {
	144	+ compatible = "regulator-fixed";
	145	+ regulator-name = "1P8V";
	146	+ regulator-min-microvolt = <1800000>;
	147	+ regulator-max-microvolt = <1800000>;
	148	+ regulator-boot-on;
	149	+ regulator-always-on;
	150	+ };
	151	+
	152	+ backlight_lcd: backlight-lcd {
	153	+ compatible = "pwm-backlight";
	154	+ pwms = <&pwm1 0 5000000>;
	155	+ brightness-levels = <0 4 8 16 32 64 128 255>;
	156	+ default-brightness-level = <7>;
	157	+ power-supply = <&reg_3p3v>;
	158	+ status = "disabled";
	159	+ };
	160	+
	161	+ /* 1-Wire sentinel for overlay */
	162	+ w1: w1 {
	163	+ compatible = "w1-gpio";
	164	+ status = "disabled";
	165	+ };
	166	+
	167	+ mqs: mqs {
	168	+ #sound-dai-cells = <0>;
	169	+ compatible = "fsl,imx6sx-mqs";
	170	+ pinctrl-names = "default";
	171	+ pinctrl-0 = <&pinctrl_mqs>;
	172	+ clocks = <&clks IMX6UL_CLK_SAI1>;
	173	+ clock-names = "mclk";
	174	+ gpr = <&gpr>;
	175	+ status = "okay";
	176	+ };
	177	+
	178	+ sound-mqs {
	179	+ compatible = "fsl,imx-audio-mqs";
	180	+ model = "mqs-audio";
	181	+ audio-cpu = <&sai1>;
	182	+ audio-asrc = <&asrc>;
	183	+ audio-codec = <&mqs>;
	184	+ status = "okay";
	185	+ };
	186	+
	187	+ /* LCD panel sentinel for overlay */
	188	+ panel: panel {
	189	+ status = "disabled";
	190	+ };
	191	+
	192	+};
	193	+
	194	+/*+--------------+
	195	+ \| Misc Modules \|
	196	+ +--------------+*/
	197	+
	198	+&snvs_poweroff {
	199	+ status = "okay";
	200	+};
	201	+
	202	+&snvs_pwrkey {
	203	+ status = "okay";
	204	+};
	205	+
	206	+&uart1 {
	207	+ pinctrl-names = "default";
	208	+ pinctrl-0 = <&pinctrl_uart1>;
	209	+ status = "okay";
	210	+};
	211	+
	212	+&pwm1 { /* backlight */
	213	+ #pwm-cells = <2>;
	214	+ pinctrl-names = "default";
	215	+ pinctrl-0 = <&pinctrl_pwm1>;
	216	+ status = "okay";
	217	+};
	218	+
	219	+&pwm2 {
	220	+ #pwm-cells = <2>;
	221	+ pinctrl-names = "default";
	222	+ pinctrl-0 = <&pinctrl_pwm2>;
	223	+ status = "okay";
	224	+};
	225	+
	226	+/*+---------------+
	227	+ \| Camera Module \|
	228	+ +---------------+*/
	229	+
	230	+&i2c2 {
	231	+ clock-frequency = <100000>;
	232	+ pinctrl-names = "default";
	233	+ pinctrl-0 = <&pinctrl_i2c2>;
	234	+ status = "okay";
	235	+
	236	+ gt9xx@5d {
	237	+ compatible = "goodix,gt9147";
	238	+ reg = <0x5d>;
	239	+ pinctrl-names = "default";
	240	+ pinctrl-0 = <&pinctrl_ts_pins>;
	241	+
	242	+ irq-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
	243	+ reset-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
	244	+ interrupt-parent = <&gpio5>;
	245	+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
	246	+
	247	+ status = "disabled"; /* Enable in LCD overlay */
	248	+ };
	249	+
	250	+ rtc@6f {
	251	+ compatible = "isil,isl1208";
	252	+ reg = <0x6f>;
	253	+ status = "okay";
	254	+ };
	255	+
	256	+ ov5640: ov5640@3c {
	257	+ compatible = "ovti,ov5640";
	258	+ reg = <0x3c>;
	259	+ pinctrl-names = "default";
	260	+ pinctrl-0 = <&pinctrl_csi1>;
	261	+ clocks = <&clks IMX6UL_CLK_CSI>;
	262	+ clock-names = "csi_mclk";
	263	+
	264	+ DOVDD-supply = <&reg_3p3v>;
	265	+ VDD-supply = <&reg_1p8v>;
	266	+ AVDD-supply = <&reg_3p3v>;
	267	+ DVDD-supply = <&reg_3p3v>;
	268	+
	269	+ pwn-gpios = <&gpio5 6 GPIO_ACTIVE_HIGH>;
	270	+ rst-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
	271	+ csi_id = <0>;
	272	+ mclk = <24000000>;
	273	+ mclk_source = <0>;
	274	+ /* rotation = <180>; */
	275	+ status = "disabled"; /* Enable in CAM overlay */
	276	+ port {
	277	+ ov5640_ep: endpoint {
	278	+ remote-endpoint = <&csi1_ep>;
	279	+ };
	280	+ };
	281	+ };
	282	+
	283	+};
	284	+
	285	+&csi {
	286	+ status = "disabled";
	287	+ port {
	288	+ csi1_ep: endpoint {
	289	+ remote-endpoint = <&ov5640_ep>;
	290	+ };
	291	+ };
	292	+};
	293	+
	294	+/*+--------------+
	295	+ \| Audio Module \|
	296	+ +--------------+*/
	297	+
	298	+&clks {
	299	+ assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
	300	+ //assigned-clock-rates = <786432000>; // 16bit,2Ch,48KHz
	301	+ assigned-clock-rates = <722534400>; // 16bit,2Ch,44.1KHz
	302	+};
	303	+
	304	+&sai1 {
	305	+ assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>, <&clks IMX6UL_CLK_SAI1>;
	306	+ assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
	307	+ //assigned-clock-rates = <0>, <24576000>; // 16bit,2Ch,48KHz
	308	+ assigned-clock-rates = <0>, <22579200>; // 16bit,2Ch,44.1KHz
	309	+ fsl,sai-mclk-direction-output;
	310	+ status = "okay";
	311	+};
	312	+
	313	+/*+------------------+
	314	+ \| Ethernet Modules \|
	315	+ +------------------+*/
	316	+
	317	+&fec1 {
	318	+ pinctrl-names = "default";
	319	+ pinctrl-0 = <&pinctrl_enet1>;
	320	+ phy-mode = "rmii";
	321	+ phy-handle = <&ethphy0>;
	322	+ phy-supply = <&reg_peri_3v3>;
	323	+ phy-reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
	324	+ phy-reset-duration = <50>;
	325	+ phy-reset-post-delay = <15>;
	326	+ status = "okay";
	327	+};
	328	+
	329	+&fec2 {
	330	+ pinctrl-names = "default";
	331	+ pinctrl-0 = <&pinctrl_enet2>;
	332	+ phy-mode = "rmii";
	333	+ phy-handle = <&ethphy1>;
	334	+ phy-supply = <&reg_peri_3v3>;
	335	+ phy-reset-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
	336	+ phy-reset-duration = <50>;
	337	+ phy-reset-post-delay = <15>;
	338	+ status = "okay";
	339	+
	340	+ mdio {
	341	+ #address-cells = <1>;
	342	+ #size-cells = <0>;
	343	+
	344	+ ethphy0: ethernet-phy@0 {
	345	+ compatible = "ethernet-phy-id0022.1560";
	346	+ reg = <0>;
	347	+ micrel,led-mode = <1>;
	348	+ clocks = <&clks IMX6UL_CLK_ENET_REF>;
	349	+ clock-names = "rmii-ref";
	350	+
	351	+ };
	352	+
	353	+ ethphy1: ethernet-phy@1 {
	354	+ compatible = "ethernet-phy-id0022.1560";
	355	+ reg = <1>;
	356	+ micrel,led-mode = <1>;
	357	+ clocks = <&clks IMX6UL_CLK_ENET2_REF>;
	358	+ clock-names = "rmii-ref";
	359	+ };
	360	+ };
	361	+};
	362	+
	363	+/*+---------------+
	364	+ \| USB interface \|
	365	+ +---------------+*/
	366	+
	367	+&usbotg1 {
	368	+ dr_mode = "otg";
	369	+ pinctrl-names = "default";
	370	+ pinctrl-0 = <&pinctrl_usb_otg1>;
	371	+ status = "okay";
	372	+};
	373	+
	374	+&usbotg2 {
	375	+ dr_mode = "host";
	376	+ disable-over-current;
	377	+ status = "okay";
	378	+};
	379	+
	380	+&usbphy1 {
	381	+ fsl,tx-d-cal = <106>;
	382	+};
	383	+
	384	+&usbphy2 {
	385	+ fsl,tx-d-cal = <106>;
	386	+};
	387	+
	388	+/*+------------------+
	389	+ \| USDCHC interface \|
	390	+ +------------------+*/
	391	+
	392	+&usdhc1 {
	393	+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
	394	+ pinctrl-0 = <&pinctrl_usdhc1>;
	395	+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
	396	+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
	397	+ cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
	398	+ keep-power-in-suspend;
	399	+ wakeup-source;
	400	+ vmmc-supply = <&reg_sd1_vmmc>;
	401	+ status = "okay";
	402	+};
	403	+
	404	+&usdhc2 {
	405	+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
	406	+ pinctrl-0 = <&pinctrl_usdhc2_8bit>;
	407	+ pinctrl-1 = <&pinctrl_usdhc2_8bit_100mhz>;
	408	+ pinctrl-2 = <&pinctrl_usdhc2_8bit_200mhz>;
	409	+ non-removable;
	410	+ bus-width = <8>;
	411	+ keep-power-in-suspend;
	412	+ wakeup-source;
	413	+ status = "okay";
	414	+};
	415	+
	416	+/*+----------------------+
	417	+ \| Basic pinctrl iomuxc \|
	418	+ +----------------------+*/
	419	+
	420	+&iomuxc {
	421	+ pinctrl-names = "default";
	422	+
	423	+ pinctrl_gpio_leds: gpio-leds {
	424	+ fsl,pins = <
	425	+ MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x17059 /* led run */
	426	+ >;
	427	+ };
	428	+
	429	+ pinctrl_gpio_keys: gpio-keys {
	430	+ fsl,pins = <
	431	+ MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x17059 /* gpio key */
	432	+ >;
	433	+ };
	434	+
	435	+ pinctrl_mqs: pinctrl-mqs-pins {
	436	+ fsl,pins = <
	437	+ MX6UL_PAD_JTAG_TDI__MQS_LEFT 0x11088 /* MQS Left */
	438	+ MX6UL_PAD_JTAG_TDO__MQS_RIGHT 0x11088 /* MQS Right */
	439	+ >;
	440	+ };
	441	+
	442	+ pinctrl_ts_pins: pinctrl-ts-pins {
	443	+ fsl,pins = <
	444	+ MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059 /* TouchScreen IRQ */
	445	+ MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059 /* TouchScreen RST */
	446	+ >;
	447	+ };
	448	+
	449	+ pinctrl_csi1: csi1grp {
	450	+ fsl,pins = <
	451	+ MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x17059 /* CSI_RST */
	452	+ MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x17059 /* CSI_PWDN */
	453	+ MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
	454	+ MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
	455	+ MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
	456	+ MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
	457	+ MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
	458	+ MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
	459	+ MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
	460	+ MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
	461	+ MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
	462	+ MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
	463	+ MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
	464	+ MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
	465	+ >;
	466	+ };
	467	+
	468	+ pinctrl_enet1: enet1grp {
	469	+ fsl,pins = <
	470	+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
	471	+ MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
	472	+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
	473	+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
	474	+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
	475	+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
	476	+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
	477	+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
	478	+ MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x10B0
	479	+ >;
	480	+ };
	481	+
	482	+ pinctrl_enet2: enet2grp {
	483	+ fsl,pins = <
	484	+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
	485	+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
	486	+ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
	487	+ MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
	488	+ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
	489	+ MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
	490	+ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
	491	+ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
	492	+ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
	493	+ MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
	494	+ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x10B0
	495	+ >;
	496	+ };
	497	+
	498	+ pinctrl_i2c2: i2c2grp {
	499	+ fsl,pins = <
	500	+ MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
	501	+ MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
	502	+ >;
	503	+ };
	504	+
	505	+ pinctrl_pwm1: pwm1grp {
	506	+ fsl,pins = <
	507	+ MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0
	508	+ >;
	509	+ };
	510	+
	511	+ pinctrl_pwm2: pwm2grp {
	512	+ fsl,pins = <
	513	+ MX6UL_PAD_GPIO1_IO09__PWM2_OUT 0x110b0
	514	+ >;
	515	+ };
	516	+
	517	+ pinctrl_uart1: uart1grp {
	518	+ fsl,pins = <
	519	+ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
	520	+ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
	521	+ >;
	522	+ };
	523	+
	524	+ pinctrl_usb_otg1: usbotg1grp {
	525	+ fsl,pins = <
	526	+ MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
	527	+ >;
	528	+ };
	529	+
	530	+ pinctrl_usdhc1: usdhc1grp {
	531	+ fsl,pins = <
	532	+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
	533	+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071
	534	+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
	535	+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
	536	+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
	537	+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
	538	+ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059
	539	+ >;
	540	+ };
	541	+
	542	+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
	543	+ fsl,pins = <
	544	+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
	545	+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
	546	+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
	547	+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
	548	+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
	549	+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
	550	+
	551	+ >;
	552	+ };
	553	+
	554	+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
	555	+ fsl,pins = <
	556	+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
	557	+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
	558	+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
	559	+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
	560	+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
	561	+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
	562	+ >;
	563	+ };
	564	+
	565	+ pinctrl_usdhc2: usdhc2grp {
	566	+ fsl,pins = <
	567	+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059
	568	+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
	569	+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
	570	+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
	571	+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
	572	+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
	573	+ >;
	574	+ };
	575	+
	576	+ pinctrl_usdhc2_8bit: usdhc2grp_8bit {
	577	+ fsl,pins = <
	578	+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
	579	+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
	580	+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
	581	+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
	582	+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
	583	+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
	584	+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
	585	+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
	586	+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
	587	+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
	588	+ >;
	589	+ };
	590	+
	591	+ pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
	592	+ fsl,pins = <
	593	+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
	594	+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
	595	+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
	596	+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
	597	+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
	598	+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
	599	+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
	600	+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
	601	+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
	602	+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
	603	+ >;
	604	+ };
	605	+
	606	+ pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
	607	+ fsl,pins = <
	608	+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
	609	+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
	610	+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
	611	+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
	612	+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
	613	+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
	614	+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
	615	+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
	616	+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
	617	+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
	618	+ >;
	619	+ };
	620	+
	621	+};
	622	+
	623	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/Makefile b/arch/arm/boot/dts/igkboard-imx6ull/Makefile
	624	new file mode 100644
	625	index 000000000..563d3fe8d
	626	--- /dev/null
	627	+++ b/arch/arm/boot/dts/igkboard-imx6ull/Makefile
	628	@@ -0,0 +1,19 @@
	629	+# SPDX-License-Identifier: GPL-2.0
	630	+# required for overlay support
	631	+
	632	+DTC_FLAGS += -@
	633	+dtb-y += can1.dtbo
	634	+dtb-y += can2.dtbo
	635	+dtb-y += i2c1.dtbo
	636	+dtb-y += spi1.dtbo
	637	+dtb-y += uart2.dtbo
	638	+dtb-y += uart3.dtbo
	639	+dtb-y += uart4.dtbo
	640	+dtb-y += uart7.dtbo
	641	+dtb-y += pwm7.dtbo
	642	+dtb-y += pwm8.dtbo
	643	+dtb-y += w1.dtbo
	644	+dtb-y += lcd.dtbo
	645	+dtb-y += cam.dtbo
	646	+dtb-y += nbiot-4g.dtbo
	647	+dtb-y += adc.dtbo
	648	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/adc.dts b/arch/arm/boot/dts/igkboard-imx6ull/adc.dts
	649	new file mode 100644
	650	index 000000000..e06d67907
	651	--- /dev/null
	652	+++ b/arch/arm/boot/dts/igkboard-imx6ull/adc.dts
	653	@@ -0,0 +1,27 @@
	654	+/*
	655	+ * Copyright (C) 2022 LingYun IoT System Studio
	656	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	657	+ */
	658	+/dts-v1/;
	659	+/plugin/;
	660	+
	661	+#include "../imx6ul-pinfunc.h"
	662	+
	663	+/* 40-pin extended GPIO, ADC interfaces */
	664	+
	665	+&adc1 {
	666	+ pinctrl-names = "default";
	667	+ pinctrl-0 = <&pinctrl_adc1>;
	668	+ num-channels = <5>;
	669	+ vref-supply = <&reg_peri_3v3>;
	670	+ status = "okay";
	671	+};
	672	+
	673	+&iomuxc {
	674	+ pinctrl_adc1: adc1grp {
	675	+ fsl,pins = <
	676	+ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 /* ADC1_1 --->TS_YN */
	677	+ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 /* ADC1_4 --->TS_XP */
	678	+ >;
	679	+ };
	680	+};
	681	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/cam.dts b/arch/arm/boot/dts/igkboard-imx6ull/cam.dts
	682	new file mode 100644
	683	index 000000000..d4435f0d1
	684	--- /dev/null
	685	+++ b/arch/arm/boot/dts/igkboard-imx6ull/cam.dts
	686	@@ -0,0 +1,24 @@
	687	+/*
	688	+ * Copyright (C) 2022 LingYun IoT System Studio
	689	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	690	+ */
	691	+
	692	+/dts-v1/;
	693	+/plugin/;
	694	+
	695	+/* MIPI-DSI2 camera overlay */
	696	+
	697	+&pxp { /* Pixel Pipeline (PXP) is a memory-to-memory graphics processing */
	698	+ status = "okay";
	699	+};
	700	+
	701	+&csi {
	702	+ status = "okay";
	703	+};
	704	+
	705	+&i2c2 {
	706	+ ov5640@3c {
	707	+ status = "okay";
	708	+ };
	709	+};
	710	+
	711	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/can1.dts b/arch/arm/boot/dts/igkboard-imx6ull/can1.dts
	712	new file mode 100644
	713	index 000000000..fe57e00bb
	714	--- /dev/null
	715	+++ b/arch/arm/boot/dts/igkboard-imx6ull/can1.dts
	716	@@ -0,0 +1,28 @@
	717	+/*
	718	+ * Copyright (C) 2022 LingYun IoT System Studio
	719	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	720	+ */
	721	+
	722	+/dts-v1/;
	723	+/plugin/;
	724	+
	725	+#include "../imx6ul-pinfunc.h"
	726	+
	727	+/* 40-pin extended GPIO, CAN1 interfaces */
	728	+
	729	+&can1 {
	730	+ pinctrl-names = "default";
	731	+ pinctrl-0 = <&pinctrl_flexcan1>;
	732	+ xceiver-supply = <&reg_can_3v3>;
	733	+ status = "okay";
	734	+};
	735	+
	736	+&iomuxc {
	737	+ pinctrl_flexcan1: flexcan1grp{
	738	+ fsl,pins = <
	739	+ MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
	740	+ MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
	741	+ >;
	742	+ };
	743	+};
	744	+
	745	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/can2.dts b/arch/arm/boot/dts/igkboard-imx6ull/can2.dts
	746	new file mode 100644
	747	index 000000000..7eada165a
	748	--- /dev/null
	749	+++ b/arch/arm/boot/dts/igkboard-imx6ull/can2.dts
	750	@@ -0,0 +1,28 @@
	751	+/*
	752	+ * Copyright (C) 2022 LingYun IoT System Studio
	753	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	754	+ */
	755	+
	756	+/dts-v1/;
	757	+/plugin/;
	758	+
	759	+#include "../imx6ul-pinfunc.h"
	760	+
	761	+/* 40-pin extended GPIO, CAN2 interfaces */
	762	+
	763	+&can2 {
	764	+ pinctrl-names = "default";
	765	+ pinctrl-0 = <&pinctrl_flexcan2>;
	766	+ xceiver-supply = <&reg_can_3v3>;
	767	+ status = "okay";
	768	+};
	769	+
	770	+&iomuxc {
	771	+ pinctrl_flexcan2: flexcan2grp{
	772	+ fsl,pins = <
	773	+ MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
	774	+ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
	775	+ >;
	776	+ };
	777	+};
	778	+
	779	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/i2c1.dts b/arch/arm/boot/dts/igkboard-imx6ull/i2c1.dts
	780	new file mode 100644
	781	index 000000000..ce99b9a18
	782	--- /dev/null
	783	+++ b/arch/arm/boot/dts/igkboard-imx6ull/i2c1.dts
	784	@@ -0,0 +1,28 @@
	785	+/*
	786	+ * Copyright (C) 2022 LingYun IoT System Studio
	787	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	788	+ */
	789	+
	790	+/dts-v1/;
	791	+/plugin/;
	792	+
	793	+#include "../imx6ul-pinfunc.h"
	794	+
	795	+/* 40-pin extended GPIO, I2C1 interfaces */
	796	+
	797	+&i2c1 {
	798	+ clock-frequency = <100000>;
	799	+ pinctrl-names = "default";
	800	+ pinctrl-0 = <&pinctrl_i2c1>;
	801	+ status = "okay";
	802	+};
	803	+
	804	+&iomuxc {
	805	+ pinctrl_i2c1: i2c1grp {
	806	+ fsl,pins = <
	807	+ MX6UL_PAD_GPIO1_IO02__I2C1_SCL 0x4001b8b0
	808	+ MX6UL_PAD_GPIO1_IO03__I2C1_SDA 0x4001b8b0
	809	+ >;
	810	+ };
	811	+};
	812	+
	813	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/lcd.dts b/arch/arm/boot/dts/igkboard-imx6ull/lcd.dts
	814	new file mode 100644
705df3	815	index 000000000..061cc612b
d80f34	816	--- /dev/null
G	817	+++ b/arch/arm/boot/dts/igkboard-imx6ull/lcd.dts
705df3	818	@@ -0,0 +1,83 @@
d80f34	819	+/*
G	820	+ * Copyright (C) 2022 LingYun IoT System Studio
	821	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	822	+ */
	823	+
	824	+/dts-v1/;
	825	+/plugin/;
	826	+
	827	+#include <dt-bindings/clock/imx6ul-clock.h>
	828	+#include "../imx6ul-pinfunc.h"
	829	+
	830	+/* LCD DRM display overlay */
	831	+
	832	+&backlight_lcd {
	833	+ status = "okay";
	834	+};
	835	+
	836	+&i2c2 {
	837	+ gt9xx@5d {
	838	+ status = "okay";
	839	+ };
	840	+};
	841	+
705df3	842	+/* CONFIG_DRM_MXSFB use DRM driver: drivers/gpu/drm/mxsfb/mxsfb_drv.c */
d80f34	843	+&lcdif {
G	844	+ assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>;
	845	+ assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>;
	846	+ pinctrl-names = "default";
	847	+ pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>;
	848	+ status = "okay";
	849	+
	850	+ port {
	851	+ display_output: endpoint {
	852	+ remote-endpoint = <&panel_input>;
	853	+ };
	854	+ };
	855	+};
	856	+
	857	+&panel {
	858	+ compatible = "lingyun,igkboard-imx6ull-panel", "panel-simple";
	859	+ backlight = <&backlight_lcd>;
	860	+ power-supply = <&reg_3p3v>;
	861	+ status = "okay";
	862	+
	863	+ port {
	864	+ panel_input: endpoint {
	865	+ remote-endpoint = <&display_output>;
	866	+ };
	867	+ };
	868	+};
	869	+
	870	+&iomuxc {
	871	+ pinctrl_lcdif_dat: lcdifdatgrp {
	872	+ fsl,pins = <
	873	+ MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
	874	+ MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
	875	+ MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
	876	+ MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
	877	+ MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
	878	+ MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
	879	+ MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
	880	+ MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
	881	+ MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
	882	+ MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
	883	+ MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
	884	+ MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
	885	+ MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
	886	+ MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
	887	+ MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
	888	+ MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
	889	+ >;
	890	+ };
	891	+
	892	+ pinctrl_lcdif_ctrl: lcdifctrlgrp {
	893	+ fsl,pins = <
	894	+ MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
	895	+ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
	896	+ MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
	897	+ MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
	898	+ MX6UL_PAD_LCD_RESET__LCDIF_RESET 0x79
	899	+ >;
	900	+ };
	901	+};
	902	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/nbiot-4g.dts b/arch/arm/boot/dts/igkboard-imx6ull/nbiot-4g.dts
	903	new file mode 100644
	904	index 000000000..07e278e7e
	905	--- /dev/null
	906	+++ b/arch/arm/boot/dts/igkboard-imx6ull/nbiot-4g.dts
	907	@@ -0,0 +1,34 @@
	908	+/*
	909	+ * Copyright (C) 2022 LingYun IoT System Studio
	910	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	911	+ */
	912	+
	913	+/dts-v1/;
	914	+/plugin/;
	915	+
	916	+#include "../imx6ul-pinfunc.h"
	917	+
	918	+/* NB-IoT/4G module use UART8 interfaces, conflict with SPI interface */
	919	+
	920	+&uart8 {
	921	+ pinctrl-names = "default";
	922	+ pinctrl-0 = <&pinctrl_spi_uart8 &pinctrl_nbiot_ctrl>;
	923	+ status = "okay";
	924	+};
	925	+
	926	+&iomuxc {
	927	+ pinctrl_spi_uart8: spi_uart8_grp {
	928	+ fsl,pins = <
	929	+ MX6UL_PAD_LCD_DATA20__UART8_DCE_TX 0x1b0b1 /* MRXD */
	930	+ MX6UL_PAD_LCD_DATA21__UART8_DCE_RX 0x1b0b1 /* MTXD */
	931	+ >;
	932	+ };
	933	+
	934	+ pinctrl_nbiot_ctrl: nbiot_ctrl_grp {
	935	+ fsl,pins = <
	936	+ MX6UL_PAD_LCD_DATA22__GPIO3_IO27 0x17059 /* NB_PWREN/4G_RESET */
	937	+ MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15 0x17059 /* NB_MRST/4G_POWER_KEY */
	938	+ >;
	939	+ };
	940	+};
	941	+
	942	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/pwm7.dts b/arch/arm/boot/dts/igkboard-imx6ull/pwm7.dts
	943	new file mode 100644
	944	index 000000000..6467a21a6
	945	--- /dev/null
	946	+++ b/arch/arm/boot/dts/igkboard-imx6ull/pwm7.dts
	947	@@ -0,0 +1,28 @@
	948	+/*
	949	+ * Copyright (C) 2022 LingYun IoT System Studio
	950	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	951	+ */
	952	+
	953	+/dts-v1/;
	954	+/plugin/;
	955	+
	956	+#include <dt-bindings/clock/imx6ul-clock.h>
	957	+#include "../imx6ul-pinfunc.h"
	958	+
	959	+/* 40-pin extended GPIO, PWM7 interfaces */
	960	+
	961	+&pwm7 {
	962	+ pinctrl-names = "default";
	963	+ pinctrl-0 = <&pinctrl_pwm7>;
	964	+ clocks = <&clks IMX6UL_CLK_PWM7>, <&clks IMX6UL_CLK_PWM7>;
	965	+ status = "okay";
	966	+};
	967	+
	968	+&iomuxc {
	969	+ pinctrl_pwm7: pwm7grp {
	970	+ fsl,pins = <
	971	+ MX6UL_PAD_JTAG_TCK__PWM7_OUT 0x110b0
	972	+ >;
	973	+ };
	974	+};
	975	+
	976	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/pwm8.dts b/arch/arm/boot/dts/igkboard-imx6ull/pwm8.dts
	977	new file mode 100644
	978	index 000000000..edfc3a7b6
	979	--- /dev/null
	980	+++ b/arch/arm/boot/dts/igkboard-imx6ull/pwm8.dts
	981	@@ -0,0 +1,28 @@
	982	+/*
	983	+ * Copyright (C) 2022 LingYun IoT System Studio
	984	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	985	+ */
	986	+
	987	+/dts-v1/;
	988	+/plugin/;
	989	+
	990	+#include <dt-bindings/clock/imx6ul-clock.h>
	991	+#include "../imx6ul-pinfunc.h"
	992	+
	993	+/* 40-pin extended GPIO, PWM8 interfaces, conflict with NB-IoT */
	994	+
	995	+&pwm8 {
	996	+ pinctrl-names = "default";
	997	+ pinctrl-0 = <&pinctrl_pwm8_nbiot>;
	998	+ clocks = <&clks IMX6UL_CLK_PWM8>, <&clks IMX6UL_CLK_PWM8>;
	999	+ status = "okay";
	1000	+};
	1001	+
	1002	+&iomuxc {
	1003	+ pinctrl_pwm8_nbiot: pwm8nbiotgrp {
	1004	+ fsl,pins = <
	1005	+ MX6UL_PAD_JTAG_TRST_B__PWM8_OUT 0x110b0
	1006	+ >;
	1007	+ };
	1008	+};
	1009	+
	1010	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/spi1.dts b/arch/arm/boot/dts/igkboard-imx6ull/spi1.dts
	1011	new file mode 100644
	1012	index 000000000..a32dc451b
	1013	--- /dev/null
	1014	+++ b/arch/arm/boot/dts/igkboard-imx6ull/spi1.dts
	1015	@@ -0,0 +1,39 @@
	1016	+/*
	1017	+ * Copyright (C) 2022 LingYun IoT System Studio
	1018	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	1019	+ */
	1020	+
	1021	+/dts-v1/;
	1022	+/plugin/;
	1023	+
	1024	+#include <dt-bindings/gpio/gpio.h>
	1025	+#include "../imx6ul-pinfunc.h"
	1026	+
	1027	+/* 40-pin extended GPIO, SPI1 interfaces, conflict with UART8 */
	1028	+
	1029	+&ecspi1 {
	1030	+ pinctrl-names = "default";
	1031	+ pinctrl-0 = <&pinctrl_spi_uart8>;
	1032	+ cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
	1033	+ status = "okay";
	1034	+
	1035	+ #address-cells = <1>;
	1036	+ #size-cells = <0>;
	1037	+
	1038	+ spidev0: spi@0 {
	1039	+ reg = <0>;
	1040	+ compatible = "semtech,sx1301";
	1041	+ spi-max-frequency = <1000000>;
	1042	+ };
	1043	+};
	1044	+
	1045	+&iomuxc {
	1046	+ pinctrl_spi_uart8: spi_uart8_grp {
	1047	+ fsl,pins = <
	1048	+ MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x10b0
	1049	+ MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x10b0
	1050	+ MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x10b0
	1051	+ MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x10b0
	1052	+ >;
	1053	+ };
	1054	+};
	1055	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/uart2.dts b/arch/arm/boot/dts/igkboard-imx6ull/uart2.dts
	1056	new file mode 100644
	1057	index 000000000..2b48a9cd7
	1058	--- /dev/null
	1059	+++ b/arch/arm/boot/dts/igkboard-imx6ull/uart2.dts
	1060	@@ -0,0 +1,26 @@
	1061	+/*
	1062	+ * Copyright (C) 2022 LingYun IoT System Studio
	1063	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	1064	+ */
	1065	+
	1066	+/dts-v1/;
	1067	+/plugin/;
	1068	+
	1069	+#include "../imx6ul-pinfunc.h"
	1070	+
	1071	+/* 40-pin extended GPIO, UART2 interfaces */
	1072	+
	1073	+&uart2 {
	1074	+ pinctrl-names = "default";
	1075	+ pinctrl-0 = <&pinctrl_uart2>;
	1076	+ status = "okay";
	1077	+};
	1078	+
	1079	+&iomuxc {
	1080	+ pinctrl_uart2: uart2grp {
	1081	+ fsl,pins = <
	1082	+ MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
	1083	+ MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
	1084	+ >;
	1085	+ };
	1086	+};
	1087	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/uart3.dts b/arch/arm/boot/dts/igkboard-imx6ull/uart3.dts
	1088	new file mode 100644
	1089	index 000000000..7d9e8cdd1
	1090	--- /dev/null
	1091	+++ b/arch/arm/boot/dts/igkboard-imx6ull/uart3.dts
	1092	@@ -0,0 +1,27 @@
	1093	+/*
	1094	+ * Copyright (C) 2022 LingYun IoT System Studio
	1095	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	1096	+ */
	1097	+
	1098	+/dts-v1/;
	1099	+/plugin/;
	1100	+
	1101	+#include "../imx6ul-pinfunc.h"
	1102	+
	1103	+/* 40-pin extended GPIO, UART3 interfaces */
	1104	+
	1105	+&uart3 {
	1106	+ pinctrl-names = "default";
	1107	+ pinctrl-0 = <&pinctrl_uart3>;
	1108	+ status = "okay";
	1109	+};
	1110	+
	1111	+&iomuxc {
	1112	+ pinctrl_uart3: uart3grp {
	1113	+ fsl,pins = <
	1114	+ MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
	1115	+ MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
	1116	+ >;
	1117	+ };
	1118	+};
	1119	+
	1120	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/uart4.dts b/arch/arm/boot/dts/igkboard-imx6ull/uart4.dts
	1121	new file mode 100644
	1122	index 000000000..aa81b91eb
	1123	--- /dev/null
	1124	+++ b/arch/arm/boot/dts/igkboard-imx6ull/uart4.dts
	1125	@@ -0,0 +1,27 @@
	1126	+/*
	1127	+ * Copyright (C) 2022 LingYun IoT System Studio
	1128	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	1129	+ */
	1130	+
	1131	+/dts-v1/;
	1132	+/plugin/;
	1133	+
	1134	+#include "../imx6ul-pinfunc.h"
	1135	+
	1136	+/* 40-pin extended GPIO, UART4 interfaces */
	1137	+
	1138	+&uart4 {
	1139	+ pinctrl-names = "default";
	1140	+ pinctrl-0 = <&pinctrl_uart4>;
	1141	+ status = "okay";
	1142	+};
	1143	+
	1144	+&iomuxc {
	1145	+ pinctrl_uart4: uart4grp {
	1146	+ fsl,pins = <
	1147	+ MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
	1148	+ MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
	1149	+ >;
	1150	+ };
	1151	+};
	1152	+
	1153	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/uart7.dts b/arch/arm/boot/dts/igkboard-imx6ull/uart7.dts
	1154	new file mode 100644
	1155	index 000000000..0229b345e
	1156	--- /dev/null
	1157	+++ b/arch/arm/boot/dts/igkboard-imx6ull/uart7.dts
	1158	@@ -0,0 +1,27 @@
	1159	+/*
	1160	+ * Copyright (C) 2022 LingYun IoT System Studio
	1161	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	1162	+ */
	1163	+
	1164	+/dts-v1/;
	1165	+/plugin/;
	1166	+
	1167	+#include "../imx6ul-pinfunc.h"
	1168	+
	1169	+/* 40-pin extended GPIO, UART7 interfaces, conflict with LCD display */
	1170	+
	1171	+&uart7 {
	1172	+ pinctrl-names = "default";
	1173	+ pinctrl-0 = <&pinctrl_uart7>;
	1174	+ status = "okay";
	1175	+};
	1176	+
	1177	+&iomuxc {
	1178	+ pinctrl_uart7: uart7grp {
	1179	+ fsl,pins = <
	1180	+ MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x1b0b1
	1181	+ MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x1b0b1
	1182	+ >;
	1183	+ };
	1184	+};
	1185	+
	1186	diff --git a/arch/arm/boot/dts/igkboard-imx6ull/w1.dts b/arch/arm/boot/dts/igkboard-imx6ull/w1.dts
	1187	new file mode 100644
	1188	index 000000000..bc3945ecb
	1189	--- /dev/null
	1190	+++ b/arch/arm/boot/dts/igkboard-imx6ull/w1.dts
	1191	@@ -0,0 +1,31 @@
	1192	+/*
	1193	+ * Copyright (C) 2022 LingYun IoT System Studio
	1194	+ * Author: Guo Wenxue<guowenxue@gmail.com>
	1195	+ */
	1196	+
	1197	+/dts-v1/;
	1198	+/plugin/;
	1199	+
	1200	+#include <dt-bindings/gpio/gpio.h>
	1201	+#include "../imx6ul-pinfunc.h"
	1202	+
	1203	+/* W1(DS18B20) on 40Pin Header Pin#7 (GPIO1_IO18) */
	1204	+
	1205	+&w1 {
	1206	+ compatible = "w1-gpio";
	1207	+ status = "okay";
	1208	+
	1209	+ pinctrl-names = "default";
	1210	+ pinctrl-0 = <&pinctrl_w1>;
	1211	+ gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
	1212	+};
	1213	+
	1214	+
	1215	+&iomuxc {
	1216	+ pinctrl_w1: w1grp {
	1217	+ fsl,pins = <
	1218	+ MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x110b0
	1219	+ >;
	1220	+ };
	1221	+};
	1222	+
	1223	diff --git a/arch/arm/configs/igkboard-imx6ull_defconfig b/arch/arm/configs/igkboard-imx6ull_defconfig
	1224	new file mode 100644
705df3	1225	index 000000000..87fd9dcfe
d80f34	1226	--- /dev/null
G	1227	+++ b/arch/arm/configs/igkboard-imx6ull_defconfig
705df3	1228	@@ -0,0 +1,574 @@
d80f34	1229	+CONFIG_KERNEL_LZO=y
G	1230	+CONFIG_SYSVIPC=y
	1231	+CONFIG_POSIX_MQUEUE=y
	1232	+CONFIG_NO_HZ=y
	1233	+CONFIG_HIGH_RES_TIMERS=y
	1234	+CONFIG_PREEMPT=y
	1235	+CONFIG_IKCONFIG=y
	1236	+CONFIG_IKCONFIG_PROC=y
	1237	+CONFIG_LOG_BUF_SHIFT=18
	1238	+CONFIG_CGROUPS=y
	1239	+CONFIG_MEMCG=y
	1240	+CONFIG_CGROUP_PIDS=y
	1241	+CONFIG_CGROUP_FREEZER=y
	1242	+CONFIG_CGROUP_DEVICE=y
	1243	+CONFIG_NAMESPACES=y
	1244	+CONFIG_USER_NS=y
	1245	+CONFIG_RELAY=y
	1246	+CONFIG_BLK_DEV_INITRD=y
	1247	+CONFIG_EXPERT=y
	1248	+CONFIG_KALLSYMS_ALL=y
	1249	+CONFIG_PERF_EVENTS=y
	1250	+CONFIG_ARCH_MXC=y
	1251	+CONFIG_SOC_IMX6Q=y
	1252	+CONFIG_SOC_IMX6SL=y
	1253	+CONFIG_SOC_IMX6SLL=y
	1254	+CONFIG_SOC_IMX6SX=y
	1255	+CONFIG_SOC_IMX6UL=y
	1256	+CONFIG_SOC_IMX7D=y
	1257	+CONFIG_SOC_IMX7ULP=y
	1258	+CONFIG_SMP=y
	1259	+CONFIG_VMSPLIT_2G=y
	1260	+CONFIG_ARM_PSCI=y
	1261	+CONFIG_HIGHMEM=y
	1262	+CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
	1263	+CONFIG_KEXEC=y
	1264	+CONFIG_CPU_FREQ=y
	1265	+CONFIG_CPU_FREQ_STAT=y
	1266	+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
	1267	+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
	1268	+CONFIG_CPU_FREQ_GOV_USERSPACE=y
	1269	+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
	1270	+CONFIG_CPUFREQ_DT=y
	1271	+CONFIG_ARM_IMX6Q_CPUFREQ=y
	1272	+CONFIG_ARM_IMX_CPUFREQ_DT=y
	1273	+CONFIG_CPU_IDLE=y
	1274	+CONFIG_ARM_CPUIDLE=y
	1275	+CONFIG_ARM_PSCI_CPUIDLE=y
	1276	+CONFIG_VFP=y
	1277	+CONFIG_NEON=y
	1278	+CONFIG_PM_DEBUG=y
	1279	+CONFIG_PM_TEST_SUSPEND=y
	1280	+CONFIG_KPROBES=y
	1281	+CONFIG_MODULES=y
	1282	+CONFIG_MODULE_UNLOAD=y
	1283	+CONFIG_MODVERSIONS=y
	1284	+CONFIG_MODULE_SRCVERSION_ALL=y
	1285	+CONFIG_BINFMT_MISC=m
705df3	1286	+# CONFIG_COMPAT_BRK is not set
d80f34	1287	+CONFIG_CMA=y
G	1288	+CONFIG_NET=y
	1289	+CONFIG_PACKET=y
	1290	+CONFIG_UNIX=y
705df3	1291	+CONFIG_TLS=y
G	1292	+CONFIG_TLS_DEVICE=y
d80f34	1293	+CONFIG_INET=y
G	1294	+CONFIG_IP_MULTICAST=y
	1295	+CONFIG_IP_PNP=y
	1296	+CONFIG_IP_PNP_DHCP=y
	1297	+CONFIG_NETFILTER=y
	1298	+CONFIG_VLAN_8021Q=m
	1299	+CONFIG_LLC2=y
	1300	+CONFIG_CAN=y
	1301	+CONFIG_BT=y
	1302	+CONFIG_BT_RFCOMM=y
	1303	+CONFIG_BT_RFCOMM_TTY=y
	1304	+CONFIG_BT_BNEP=y
	1305	+CONFIG_BT_BNEP_MC_FILTER=y
	1306	+CONFIG_BT_BNEP_PROTO_FILTER=y
	1307	+CONFIG_BT_HIDP=y
	1308	+CONFIG_BT_HCIBTUSB=y
	1309	+CONFIG_BT_HCIUART=y
	1310	+CONFIG_BT_HCIUART_BCSP=y
	1311	+CONFIG_BT_HCIUART_LL=y
	1312	+CONFIG_BT_HCIUART_3WIRE=y
	1313	+CONFIG_BT_HCIUART_MRVL=y
	1314	+CONFIG_BT_HCIVHCI=y
	1315	+CONFIG_BT_MRVL=y
	1316	+CONFIG_BT_MRVL_SDIO=y
	1317	+CONFIG_CFG80211=y
	1318	+CONFIG_NL80211_TESTMODE=y
	1319	+CONFIG_CFG80211_WEXT=y
	1320	+CONFIG_MAC80211=y
	1321	+CONFIG_PCI=y
	1322	+CONFIG_PCI_MSI=y
	1323	+CONFIG_PCI_IMX6_HOST=y
	1324	+CONFIG_PCI_IMX6_EP=y
	1325	+CONFIG_PCI_ENDPOINT=y
	1326	+CONFIG_PCI_ENDPOINT_CONFIGFS=y
	1327	+CONFIG_PCI_EPF_TEST=y
	1328	+CONFIG_DEVTMPFS=y
	1329	+CONFIG_DEVTMPFS_MOUNT=y
	1330	+# CONFIG_STANDALONE is not set
	1331	+CONFIG_FW_LOADER_USER_HELPER=y
	1332	+CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
	1333	+CONFIG_IMX_WEIM=y
	1334	+CONFIG_CONNECTOR=y
	1335	+CONFIG_MTD=y
	1336	+CONFIG_MTD_CMDLINE_PARTS=y
	1337	+CONFIG_MTD_BLOCK=y
	1338	+CONFIG_MTD_CFI=y
	1339	+CONFIG_MTD_JEDECPROBE=y
	1340	+CONFIG_MTD_CFI_INTELEXT=y
	1341	+CONFIG_MTD_CFI_AMDSTD=y
	1342	+CONFIG_MTD_CFI_STAA=y
	1343	+CONFIG_MTD_PHYSMAP=y
	1344	+CONFIG_MTD_PHYSMAP_OF=y
	1345	+CONFIG_MTD_DATAFLASH=y
	1346	+CONFIG_MTD_SST25L=y
	1347	+CONFIG_MTD_RAW_NAND=y
	1348	+CONFIG_MTD_NAND_GPMI_NAND=y
	1349	+CONFIG_MTD_NAND_MXC=y
	1350	+CONFIG_MTD_SPI_NOR=y
	1351	+# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
	1352	+CONFIG_MTD_UBI=y
	1353	+CONFIG_MTD_UBI_FASTMAP=y
	1354	+CONFIG_MTD_UBI_BLOCK=y
	1355	+CONFIG_OF_OVERLAY=y
	1356	+CONFIG_BLK_DEV_LOOP=y
	1357	+CONFIG_BLK_DEV_RAM=y
	1358	+CONFIG_BLK_DEV_RAM_SIZE=65536
	1359	+CONFIG_PCI_ENDPOINT_TEST=y
	1360	+CONFIG_EEPROM_AT24=y
	1361	+CONFIG_EEPROM_AT25=y
	1362	+# CONFIG_SCSI_PROC_FS is not set
	1363	+CONFIG_BLK_DEV_SD=y
	1364	+# CONFIG_BLK_DEV_BSG is not set
	1365	+CONFIG_SCSI_CONSTANTS=y
	1366	+CONFIG_SCSI_LOGGING=y
	1367	+CONFIG_SCSI_SCAN_ASYNC=y
	1368	+CONFIG_ATA=y
	1369	+CONFIG_SATA_AHCI_PLATFORM=y
	1370	+CONFIG_AHCI_IMX=y
	1371	+CONFIG_PATA_IMX=y
	1372	+CONFIG_MD=y
	1373	+CONFIG_BLK_DEV_MD=m
	1374	+CONFIG_BLK_DEV_DM=m
	1375	+CONFIG_DM_CRYPT=m
	1376	+CONFIG_NETDEVICES=y
	1377	+CONFIG_TUN=y
	1378	+# CONFIG_NET_VENDOR_BROADCOM is not set
	1379	+CONFIG_CS89x0_PLATFORM=y
	1380	+# CONFIG_NET_VENDOR_FARADAY is not set
	1381	+# CONFIG_NET_VENDOR_INTEL is not set
	1382	+# CONFIG_NET_VENDOR_MARVELL is not set
	1383	+# CONFIG_NET_VENDOR_MICREL is not set
	1384	+# CONFIG_NET_VENDOR_MICROCHIP is not set
	1385	+# CONFIG_NET_VENDOR_NATSEMI is not set
	1386	+# CONFIG_NET_VENDOR_SEEQ is not set
	1387	+CONFIG_SMC91X=y
	1388	+CONFIG_SMC911X=y
	1389	+CONFIG_SMSC911X=y
	1390	+# CONFIG_NET_VENDOR_STMICRO is not set
	1391	+CONFIG_MICREL_PHY=y
	1392	+CONFIG_AT803X_PHY=y
705df3	1393	+CONFIG_CAN_FLEXCAN=y
d80f34	1394	+CONFIG_USB_PEGASUS=m
G	1395	+CONFIG_USB_RTL8150=m
	1396	+CONFIG_USB_RTL8152=y
	1397	+CONFIG_USB_LAN78XX=y
	1398	+CONFIG_USB_USBNET=y
	1399	+CONFIG_USB_NET_CDC_EEM=m
	1400	+CONFIG_USB_NET_SMSC95XX=y
	1401	+CONFIG_USB_NET_MCS7830=y
	1402	+CONFIG_ATH10K=m
	1403	+CONFIG_ATH10K_SDIO=m
	1404	+CONFIG_HOSTAP=y
	1405	+CONFIG_WL12XX=m
	1406	+CONFIG_WL18XX=m
	1407	+CONFIG_WLCORE_SDIO=m
	1408	+# CONFIG_WILINK_PLATFORM_DATA is not set
	1409	+CONFIG_INPUT_EVDEV=y
	1410	+CONFIG_INPUT_EVBUG=m
	1411	+CONFIG_KEYBOARD_GPIO=y
	1412	+CONFIG_KEYBOARD_RPMSG=y
	1413	+CONFIG_KEYBOARD_IMX=y
	1414	+CONFIG_MOUSE_PS2=m
	1415	+CONFIG_MOUSE_PS2_ELANTECH=y
	1416	+CONFIG_INPUT_TOUCHSCREEN=y
	1417	+CONFIG_TOUCHSCREEN_ADS7846=y
	1418	+CONFIG_TOUCHSCREEN_AD7879=y
	1419	+CONFIG_TOUCHSCREEN_AD7879_I2C=y
	1420	+CONFIG_TOUCHSCREEN_ATMEL_MXT=y
	1421	+CONFIG_TOUCHSCREEN_DA9052=y
	1422	+CONFIG_TOUCHSCREEN_EGALAX=y
	1423	+CONFIG_TOUCHSCREEN_ELAN_TS=y
	1424	+CONFIG_TOUCHSCREEN_GOODIX=y
	1425	+CONFIG_TOUCHSCREEN_ILI210X=y
	1426	+CONFIG_TOUCHSCREEN_MAX11801=y
	1427	+CONFIG_TOUCHSCREEN_IMX6UL_TSC=y
	1428	+CONFIG_TOUCHSCREEN_EDT_FT5X06=y
	1429	+CONFIG_TOUCHSCREEN_MC13783=y
	1430	+CONFIG_TOUCHSCREEN_TSC2004=y
	1431	+CONFIG_TOUCHSCREEN_TSC2007=y
	1432	+CONFIG_TOUCHSCREEN_STMPE=y
	1433	+CONFIG_TOUCHSCREEN_SX8654=y
	1434	+CONFIG_TOUCHSCREEN_COLIBRI_VF50=y
	1435	+CONFIG_TOUCHSCREEN_FTS=y
	1436	+CONFIG_INPUT_MISC=y
	1437	+CONFIG_INPUT_MMA8450=y
	1438	+CONFIG_SERIO_SERPORT=m
	1439	+# CONFIG_LEGACY_PTYS is not set
	1440	+CONFIG_SERIAL_IMX=y
	1441	+CONFIG_SERIAL_IMX_CONSOLE=y
	1442	+CONFIG_SERIAL_FSL_LPUART=y
	1443	+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
	1444	+CONFIG_SERIAL_DEV_BUS=y
	1445	+# CONFIG_I2C_COMPAT is not set
	1446	+CONFIG_I2C_CHARDEV=y
	1447	+CONFIG_I2C_MUX=y
	1448	+CONFIG_I2C_MUX_GPIO=y
	1449	+# CONFIG_I2C_HELPER_AUTO is not set
	1450	+CONFIG_I2C_ALGOPCF=m
	1451	+CONFIG_I2C_ALGOPCA=m
	1452	+CONFIG_I2C_GPIO=y
	1453	+CONFIG_I2C_IMX=y
	1454	+CONFIG_I2C_IMX_LPI2C=y
	1455	+CONFIG_SPI=y
	1456	+CONFIG_SPI_FSL_LPSPI=y
	1457	+CONFIG_SPI_FSL_QUADSPI=y
	1458	+CONFIG_SPI_GPIO=y
	1459	+CONFIG_SPI_IMX=y
	1460	+CONFIG_SPI_SPIDEV=y
	1461	+CONFIG_SPI_SLAVE=y
	1462	+CONFIG_SPI_SLAVE_TIME=y
	1463	+CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y
	1464	+CONFIG_GPIO_SYSFS=y
705df3	1465	+CONFIG_GPIO_IMX_RPMSG=y
d80f34	1466	+CONFIG_GPIO_MXC=y
G	1467	+CONFIG_GPIO_SIOX=m
	1468	+CONFIG_GPIO_MAX732X=y
	1469	+CONFIG_GPIO_PCA953X=y
	1470	+CONFIG_GPIO_PCF857X=y
	1471	+CONFIG_GPIO_STMPE=y
	1472	+CONFIG_GPIO_74X164=y
705df3	1473	+CONFIG_W1=y
G	1474	+CONFIG_W1_MASTER_GPIO=y
	1475	+CONFIG_W1_SLAVE_THERM=y
d80f34	1476	+CONFIG_POWER_RESET=y
G	1477	+CONFIG_POWER_RESET_SYSCON=y
	1478	+CONFIG_POWER_RESET_SYSCON_POWEROFF=y
	1479	+CONFIG_POWER_SUPPLY=y
	1480	+CONFIG_SABRESD_MAX8903=y
	1481	+CONFIG_RN5T618_POWER=m
	1482	+CONFIG_SENSORS_MC13783_ADC=y
	1483	+CONFIG_SENSORS_GPIO_FAN=y
	1484	+CONFIG_SENSORS_IIO_HWMON=y
	1485	+CONFIG_SENSORS_MAX17135=y
	1486	+CONFIG_THERMAL=y
	1487	+CONFIG_THERMAL_STATISTICS=y
	1488	+CONFIG_THERMAL_WRITABLE_TRIPS=y
	1489	+CONFIG_CPU_THERMAL=y
	1490	+CONFIG_IMX_THERMAL=y
	1491	+CONFIG_DEVICE_THERMAL=y
	1492	+CONFIG_WATCHDOG=y
	1493	+CONFIG_DA9063_WATCHDOG=m
	1494	+CONFIG_DA9062_WATCHDOG=y
	1495	+CONFIG_RN5T618_WATCHDOG=y
	1496	+CONFIG_IMX2_WDT=y
	1497	+CONFIG_IMX7ULP_WDT=y
	1498	+CONFIG_MFD_DA9052_I2C=y
	1499	+CONFIG_MFD_DA9062=y
	1500	+CONFIG_MFD_DA9063=y
	1501	+CONFIG_MFD_MC13XXX_SPI=y
	1502	+CONFIG_MFD_MC13XXX_I2C=y
705df3	1503	+CONFIG_MFD_MXC_HDMI=y
d80f34	1504	+CONFIG_MFD_MAX17135=y
G	1505	+CONFIG_MFD_RN5T618=y
	1506	+CONFIG_MFD_SI476X_CORE=y
	1507	+CONFIG_MFD_STMPE=y
	1508	+CONFIG_REGULATOR=y
	1509	+CONFIG_REGULATOR_FIXED_VOLTAGE=y
	1510	+CONFIG_REGULATOR_ANATOP=y
	1511	+CONFIG_REGULATOR_DA9052=y
	1512	+CONFIG_REGULATOR_DA9062=y
	1513	+CONFIG_REGULATOR_DA9063=y
	1514	+CONFIG_REGULATOR_GPIO=y
	1515	+CONFIG_REGULATOR_LTC3676=y
	1516	+CONFIG_REGULATOR_MAX17135=y
	1517	+CONFIG_REGULATOR_MC13783=y
	1518	+CONFIG_REGULATOR_MC13892=y
	1519	+CONFIG_REGULATOR_PF1550_RPMSG=y
	1520	+CONFIG_REGULATOR_PFUZE100=y
	1521	+CONFIG_REGULATOR_RN5T618=y
	1522	+CONFIG_RC_CORE=y
	1523	+CONFIG_RC_DEVICES=y
	1524	+CONFIG_IR_GPIO_CIR=y
	1525	+CONFIG_MEDIA_SUPPORT=y
	1526	+CONFIG_MEDIA_USB_SUPPORT=y
	1527	+CONFIG_USB_VIDEO_CLASS=m
	1528	+CONFIG_RADIO_SI476X=y
	1529	+CONFIG_V4L_PLATFORM_DRIVERS=y
705df3	1530	+CONFIG_V4L_MEM2MEM_DRIVERS=y
d80f34	1531	+CONFIG_VIDEO_MUX=y
G	1532	+CONFIG_VIDEO_MXC_CAPTURE=m
	1533	+CONFIG_VIDEO_MXC_CSI_CAMERA=m
	1534	+CONFIG_MXC_VADC=m
	1535	+CONFIG_MXC_MIPI_CSI=m
	1536	+CONFIG_MXC_CAMERA_OV5640=m
	1537	+CONFIG_MXC_CAMERA_OV5640_V2=m
	1538	+CONFIG_MXC_CAMERA_OV5640_MIPI=m
	1539	+CONFIG_MXC_CAMERA_OV5640_MIPI_V2=m
	1540	+CONFIG_MXC_TVIN_ADV7180=m
	1541	+CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m
705df3	1542	+CONFIG_VIDEO_MXC_OUTPUT=y
d80f34	1543	+CONFIG_VIDEO_MXC_IPU_OUTPUT=y
G	1544	+CONFIG_VIDEO_MXC_PXP_V4L2=y
	1545	+CONFIG_VIDEO_CODA=m
	1546	+CONFIG_VIDEO_IMX_PXP=y
	1547	+CONFIG_VIDEO_OV2680=m
	1548	+CONFIG_VIDEO_OV5645=m
705df3	1549	+CONFIG_VIDEO_ADV7180=m
d80f34	1550	+CONFIG_DRM=y
G	1551	+CONFIG_DRM_PANEL_LVDS=y
	1552	+CONFIG_DRM_PANEL_SIMPLE=y
	1553	+CONFIG_DRM_PANEL_SEIKO_43WVF1G=y
	1554	+CONFIG_DRM_TI_TFP410=y
705df3	1555	+CONFIG_DRM_MXSFB=y
d80f34	1556	+CONFIG_FB=y
705df3	1557	+# CONFIG_FB_MX3 is not set
d80f34	1558	+CONFIG_FB_MXC_SYNC_PANEL=y
G	1559	+CONFIG_FB_MXC_OVERLAY=y
705df3	1560	+# CONFIG_FB_MXC_EDID is not set
d80f34	1561	+CONFIG_LCD_CLASS_DEVICE=y
G	1562	+CONFIG_LCD_L4F00242T03=y
	1563	+CONFIG_LCD_PLATFORM=y
705df3	1564	+CONFIG_BACKLIGHT_CLASS_DEVICE=y
d80f34	1565	+CONFIG_BACKLIGHT_PWM=y
G	1566	+CONFIG_BACKLIGHT_GPIO=y
	1567	+CONFIG_FRAMEBUFFER_CONSOLE=y
	1568	+CONFIG_LOGO=y
	1569	+CONFIG_SOUND=y
	1570	+CONFIG_SND=y
	1571	+CONFIG_SND_USB_AUDIO=m
	1572	+CONFIG_SND_SOC=y
	1573	+CONFIG_SND_SOC_FSL_ASRC=y
	1574	+CONFIG_SND_SOC_FSL_MQS=y
	1575	+CONFIG_SND_SOC_FSL_RPMSG=y
	1576	+CONFIG_SND_IMX_SOC=y
	1577	+CONFIG_SND_SOC_EUKREA_TLV320=y
	1578	+CONFIG_SND_SOC_IMX_ES8328=y
	1579	+CONFIG_SND_SOC_IMX_SGTL5000=y
	1580	+CONFIG_SND_SOC_IMX_SPDIF=y
	1581	+CONFIG_SND_SOC_FSL_ASOC_CARD=y
	1582	+CONFIG_SND_SOC_IMX_HDMI=y
	1583	+CONFIG_SND_SOC_IMX6QDL_HDMI=y
	1584	+CONFIG_SND_SOC_AC97_CODEC=y
	1585	+CONFIG_SND_SOC_CS42XX8_I2C=y
	1586	+CONFIG_SND_SOC_WM8960=y
	1587	+CONFIG_SND_SOC_WM8962=y
	1588	+CONFIG_SND_SOC_RPMSG_WM8960=y
	1589	+CONFIG_SND_SIMPLE_CARD=y
	1590	+CONFIG_HID_MULTITOUCH=y
	1591	+CONFIG_USB=y
	1592	+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
	1593	+CONFIG_USB_EHCI_HCD=y
	1594	+CONFIG_USB_HCD_TEST_MODE=y
	1595	+CONFIG_USB_ACM=m
	1596	+CONFIG_USB_STORAGE=y
	1597	+CONFIG_USB_CHIPIDEA=y
	1598	+CONFIG_USB_CHIPIDEA_UDC=y
	1599	+CONFIG_USB_CHIPIDEA_HOST=y
	1600	+CONFIG_USB_SERIAL=m
	1601	+CONFIG_USB_SERIAL_GENERIC=y
	1602	+CONFIG_USB_SERIAL_FTDI_SIO=m
	1603	+CONFIG_USB_SERIAL_OPTION=m
	1604	+CONFIG_USB_TEST=m
	1605	+CONFIG_USB_EHSET_TEST_FIXTURE=m
	1606	+CONFIG_NOP_USB_XCEIV=y
	1607	+CONFIG_USB_MXS_PHY=y
	1608	+CONFIG_USB_GADGET=y
	1609	+CONFIG_USB_CONFIGFS=y
	1610	+CONFIG_USB_CONFIGFS_SERIAL=y
	1611	+CONFIG_USB_CONFIGFS_ACM=y
	1612	+CONFIG_USB_CONFIGFS_OBEX=y
	1613	+CONFIG_USB_CONFIGFS_NCM=y
	1614	+CONFIG_USB_CONFIGFS_ECM=y
	1615	+CONFIG_USB_CONFIGFS_ECM_SUBSET=y
	1616	+CONFIG_USB_CONFIGFS_RNDIS=y
	1617	+CONFIG_USB_CONFIGFS_EEM=y
	1618	+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
	1619	+CONFIG_USB_CONFIGFS_F_LB_SS=y
	1620	+CONFIG_USB_CONFIGFS_F_FS=y
	1621	+CONFIG_USB_CONFIGFS_F_UAC1=y
	1622	+CONFIG_USB_CONFIGFS_F_UAC2=y
	1623	+CONFIG_USB_CONFIGFS_F_MIDI=y
	1624	+CONFIG_USB_CONFIGFS_F_HID=y
	1625	+CONFIG_USB_CONFIGFS_F_UVC=y
	1626	+CONFIG_USB_CONFIGFS_F_PRINTER=y
	1627	+CONFIG_USB_ZERO=m
	1628	+CONFIG_USB_AUDIO=m
	1629	+CONFIG_USB_ETH=m
	1630	+CONFIG_USB_G_NCM=m
	1631	+CONFIG_USB_GADGETFS=m
	1632	+CONFIG_USB_FUNCTIONFS=m
	1633	+CONFIG_USB_MASS_STORAGE=m
	1634	+CONFIG_USB_G_SERIAL=m
	1635	+CONFIG_MMC=y
	1636	+CONFIG_MMC_SDHCI=y
	1637	+CONFIG_MMC_SDHCI_PLTFM=y
	1638	+CONFIG_MMC_SDHCI_ESDHC_IMX=y
	1639	+CONFIG_NEW_LEDS=y
	1640	+CONFIG_LEDS_CLASS=y
	1641	+CONFIG_LEDS_GPIO=y
	1642	+CONFIG_LEDS_PWM=y
	1643	+CONFIG_LEDS_TRIGGERS=y
	1644	+CONFIG_LEDS_TRIGGER_TIMER=y
	1645	+CONFIG_LEDS_TRIGGER_ONESHOT=y
	1646	+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
	1647	+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
	1648	+CONFIG_LEDS_TRIGGER_GPIO=y
	1649	+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
	1650	+CONFIG_RTC_CLASS=y
	1651	+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
	1652	+CONFIG_RTC_DRV_DS1307=y
	1653	+CONFIG_RTC_DRV_ISL1208=y
	1654	+CONFIG_RTC_DRV_PCF8523=y
	1655	+CONFIG_RTC_DRV_PCF8563=y
	1656	+CONFIG_RTC_DRV_M41T80=y
	1657	+CONFIG_RTC_DRV_RC5T619=y
	1658	+CONFIG_RTC_DRV_DA9063=y
	1659	+CONFIG_RTC_DRV_MC13XXX=y
	1660	+CONFIG_RTC_DRV_MXC=y
	1661	+CONFIG_RTC_DRV_MXC_V2=y
	1662	+CONFIG_RTC_DRV_SNVS=y
	1663	+CONFIG_RTC_DRV_IMX_RPMSG=y
	1664	+CONFIG_DMADEVICES=y
	1665	+CONFIG_FSL_EDMA=y
	1666	+CONFIG_IMX_SDMA=y
	1667	+CONFIG_MXS_DMA=y
	1668	+CONFIG_MXC_PXP_V2=y
	1669	+CONFIG_MXC_PXP_V3=y
	1670	+CONFIG_DMATEST=m
	1671	+CONFIG_STAGING=y
	1672	+CONFIG_STAGING_MEDIA=y
	1673	+CONFIG_COMMON_CLK_PWM=y
	1674	+CONFIG_REMOTEPROC=y
	1675	+CONFIG_IMX_REMOTEPROC=y
	1676	+CONFIG_EXTCON_USB_GPIO=y
	1677	+CONFIG_IIO=y
	1678	+CONFIG_MMA8452=y
	1679	+CONFIG_IMX7D_ADC=y
	1680	+CONFIG_RN5T618_ADC=y
	1681	+CONFIG_VF610_ADC=y
	1682	+CONFIG_FXAS21002C=y
	1683	+CONFIG_FXOS8700_I2C=y
	1684	+CONFIG_RPMSG_IIO_PEDOMETER=m
	1685	+CONFIG_SENSORS_ISL29018=y
	1686	+CONFIG_MAG3110=y
	1687	+CONFIG_MPL3115=y
	1688	+CONFIG_PWM=y
	1689	+CONFIG_PWM_FSL_FTM=y
	1690	+CONFIG_PWM_IMX27=y
	1691	+CONFIG_PWM_IMX_TPM=y
	1692	+CONFIG_PHY_MIXEL_LVDS=y
	1693	+CONFIG_PHY_MIXEL_LVDS_COMBO=y
	1694	+CONFIG_NVMEM_IMX_OCOTP=y
	1695	+CONFIG_NVMEM_SNVS_LPGPR=y
	1696	+CONFIG_TEE=y
	1697	+CONFIG_OPTEE=y
	1698	+CONFIG_MUX_MMIO=y
	1699	+CONFIG_SIOX=m
	1700	+CONFIG_SIOX_BUS_GPIO=m
	1701	+CONFIG_MXC_SIM=y
	1702	+CONFIG_MXC_IPU=y
	1703	+CONFIG_MXC_SIMv2=y
	1704	+CONFIG_MXC_MLB150=y
	1705	+CONFIG_MXC_IPU_V3_PRE=y
	1706	+CONFIG_MXC_MIPI_CSI2=y
	1707	+CONFIG_EXT2_FS=y
	1708	+CONFIG_EXT2_FS_XATTR=y
	1709	+CONFIG_EXT2_FS_POSIX_ACL=y
	1710	+CONFIG_EXT2_FS_SECURITY=y
	1711	+CONFIG_EXT3_FS=y
	1712	+CONFIG_EXT3_FS_POSIX_ACL=y
	1713	+CONFIG_EXT3_FS_SECURITY=y
	1714	+CONFIG_QUOTA=y
	1715	+CONFIG_QUOTA_NETLINK_INTERFACE=y
	1716	+# CONFIG_PRINT_QUOTA_WARNING is not set
	1717	+CONFIG_AUTOFS4_FS=y
	1718	+CONFIG_FUSE_FS=y
	1719	+CONFIG_OVERLAY_FS=y
	1720	+CONFIG_ISO9660_FS=m
	1721	+CONFIG_JOLIET=y
	1722	+CONFIG_ZISOFS=y
	1723	+CONFIG_UDF_FS=m
	1724	+CONFIG_MSDOS_FS=m
	1725	+CONFIG_VFAT_FS=y
	1726	+CONFIG_TMPFS=y
	1727	+CONFIG_TMPFS_POSIX_ACL=y
	1728	+CONFIG_JFFS2_FS=y
	1729	+CONFIG_UBIFS_FS=y
	1730	+CONFIG_NFS_FS=y
	1731	+CONFIG_NFS_V3_ACL=y
	1732	+CONFIG_NFS_V4=y
	1733	+CONFIG_NFS_V4_1=y
	1734	+CONFIG_NFS_V4_2=y
	1735	+CONFIG_ROOT_NFS=y
	1736	+CONFIG_NLS_DEFAULT="cp437"
	1737	+CONFIG_NLS_CODEPAGE_437=y
	1738	+CONFIG_NLS_ASCII=y
	1739	+CONFIG_NLS_ISO8859_1=y
	1740	+CONFIG_NLS_ISO8859_15=m
	1741	+CONFIG_NLS_UTF8=y
705df3	1742	+CONFIG_TRUSTED_KEYS=m
G	1743	+# CONFIG_TRUSTED_KEYS_TEE is not set
	1744	+# CONFIG_TRUSTED_KEYS_CAAM is not set
d80f34	1745	+CONFIG_SECURITYFS=y
G	1746	+CONFIG_CRYPTO_USER=y
	1747	+CONFIG_CRYPTO_TEST=m
	1748	+CONFIG_CRYPTO_ANUBIS=m
	1749	+CONFIG_CRYPTO_BLOWFISH=m
	1750	+CONFIG_CRYPTO_CAMELLIA=m
	1751	+CONFIG_CRYPTO_CAST5=m
	1752	+CONFIG_CRYPTO_CAST6=m
	1753	+CONFIG_CRYPTO_DES=m
	1754	+CONFIG_CRYPTO_FCRYPT=m
	1755	+CONFIG_CRYPTO_KHAZAD=m
	1756	+CONFIG_CRYPTO_SEED=m
	1757	+CONFIG_CRYPTO_SERPENT=m
	1758	+CONFIG_CRYPTO_TEA=m
	1759	+CONFIG_CRYPTO_TWOFISH=m
705df3	1760	+CONFIG_CRYPTO_ARC4=m
G	1761	+CONFIG_CRYPTO_CFB=m
	1762	+CONFIG_CRYPTO_CTS=m
	1763	+CONFIG_CRYPTO_LRW=m
	1764	+CONFIG_CRYPTO_OFB=m
	1765	+CONFIG_CRYPTO_PCBC=m
	1766	+CONFIG_CRYPTO_ECHAINIV=m
	1767	+CONFIG_CRYPTO_TLS=m
	1768	+CONFIG_CRYPTO_BLAKE2B=m
	1769	+CONFIG_CRYPTO_MD4=m
	1770	+CONFIG_CRYPTO_MD5=m
	1771	+CONFIG_CRYPTO_RMD160=m
	1772	+CONFIG_CRYPTO_SHA3=m
	1773	+CONFIG_CRYPTO_STREEBOG=m
	1774	+CONFIG_CRYPTO_VMAC=m
	1775	+CONFIG_CRYPTO_WP512=m
	1776	+CONFIG_CRYPTO_XCBC=m
	1777	+CONFIG_CRYPTO_XXHASH=m
d80f34	1778	+CONFIG_CRYPTO_ANSI_CPRNG=m
705df3	1779	+CONFIG_CRYPTO_USER_API_HASH=m
G	1780	+CONFIG_CRYPTO_USER_API_SKCIPHER=m
d80f34	1781	+CONFIG_CRYPTO_USER_API_RNG=m
705df3	1782	+CONFIG_CRYPTO_USER_API_AEAD=m
d80f34	1783	+CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=m
G	1784	+CONFIG_CRYPTO_DEV_FSL_CAAM=m
	1785	+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m
	1786	+CONFIG_CRYPTO_DEV_SAHARA=y
	1787	+CONFIG_CRYPTO_DEV_MXS_DCP=y
	1788	+CONFIG_CRC_T10DIF=y
	1789	+CONFIG_CRC7=m
	1790	+CONFIG_LIBCRC32C=m
	1791	+CONFIG_DMA_CMA=y
	1792	+CONFIG_FONTS=y
	1793	+CONFIG_FONT_8x8=y
	1794	+CONFIG_FONT_8x16=y
	1795	+CONFIG_PRINTK_TIME=y
	1796	+# CONFIG_DEBUG_BUGVERBOSE is not set
	1797	+CONFIG_MAGIC_SYSRQ=y
	1798	+CONFIG_DEBUG_FS=y
705df3	1799	+# CONFIG_SLUB_DEBUG is not set
d80f34	1800	+# CONFIG_SCHED_DEBUG is not set
G	1801	+# CONFIG_DEBUG_PREEMPT is not set
	1802	+# CONFIG_FTRACE is not set
	1803	diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c b/drivers/gpu/drm/mxsfb/mxsfb_drv.c
705df3	1804	index 582db321e..40891eef4 100644
d80f34	1805	--- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c
G	1806	+++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c
	1807	@@ -370,7 +370,7 @@ static int mxsfb_probe(struct platform_device *pdev)
	1808	if (ret)
	1809	goto err_unload;
	1810
	1811	- drm_fbdev_generic_setup(drm, 32);
	1812	+ drm_fbdev_generic_setup(drm, 16); /* modify color depth to support RGB565 LCD by guowenxue */
	1813
	1814	return 0;
	1815
	1816	diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
705df3	1817	index 009e3e96c..670e30b8d 100644
d80f34	1818	--- a/drivers/gpu/drm/panel/panel-simple.c
G	1819	+++ b/drivers/gpu/drm/panel/panel-simple.c
	1820	@@ -4024,8 +4024,33 @@ static const struct panel_desc arm_rtsm = {
	1821	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
	1822	};
	1823
	1824	+static const struct drm_display_mode igkboard_6ull_panel_mode[] = {
705df3	1825	+ {
d80f34	1826	+ .clock = 30000,
705df3	1827	+ .hdisplay = 800,
d80f34	1828	+ .hsync_start = 800 + 40,
G	1829	+ .hsync_end = 800 + 40 + 48,
	1830	+ .htotal = 800 + 40 + 48 + 88,
705df3	1831	+ .vdisplay = 480,
d80f34	1832	+ .vsync_start = 480 + 13,
705df3	1833	+ .vsync_end = 480 + 13 + 3,
d80f34	1834	+ .vtotal = 480 + 13 + 3 + 32,
G	1835	+ .flags = DRM_MODE_FLAG_NVSYNC \| DRM_MODE_FLAG_NHSYNC,
705df3	1836	+ },
d80f34	1837	+};
G	1838	+
	1839	+static const struct panel_desc igkboard_6ull_panel = {
	1840	+ .modes = igkboard_6ull_panel_mode,
705df3	1841	+ .num_modes = 1,
G	1842	+ .bpc = 8,
d80f34	1843	+ .bus_format = MEDIA_BUS_FMT_RGB565_1X16,
G	1844	+};
	1845	+
	1846	static const struct of_device_id platform_of_match[] = {
	1847	{
	1848	+ .compatible = "lingyun,igkboard-imx6ull-panel",
	1849	+ .data = &igkboard_6ull_panel,
	1850	+ }, {
	1851	.compatible = "ampire,am-1280800n3tzqw-t00h",
	1852	.data = &ampire_am_1280800n3tzqw_t00h,
	1853	}, {
	1854	diff --git a/drivers/video/fbdev/core/fbcon.c b/drivers/video/fbdev/core/fbcon.c
705df3	1855	index fa205be94..5b8cdb642 100644
d80f34	1856	--- a/drivers/video/fbdev/core/fbcon.c
G	1857	+++ b/drivers/video/fbdev/core/fbcon.c
	1858	@@ -345,6 +345,7 @@ static int get_color(struct vc_data vc, struct fb_info info,
	1859	return color;
	1860	}
	1861
705df3	1862	+#if 0 /* comment by guowenxue to remove cursor */
d80f34	1863	static void fb_flashcursor(struct work_struct *work)
G	1864	{
	1865	struct fbcon_ops *ops = container_of(work, struct fbcon_ops, cursor_work.work);
	1866	@@ -384,6 +385,9 @@ static void fb_flashcursor(struct work_struct *work)
	1867	queue_delayed_work(system_power_efficient_wq, &ops->cursor_work,
	1868	ops->cur_blink_jiffies);
	1869	}
	1870	+#else
	1871	+static void fb_flashcursor(struct work_struct *work) {}
	1872	+#endif
	1873
	1874	static void fbcon_add_cursor_work(struct fb_info *info)
	1875	{
	1876	@@ -1301,6 +1305,7 @@ static void fbcon_clear_margins(struct vc_data *vc, int bottom_only)
	1877	ops->clear_margins(vc, info, margin_color, bottom_only);
	1878	}
	1879
705df3	1880	+#if 0 /* comment by guowenxue to remove cursor */
d80f34	1881	static void fbcon_cursor(struct vc_data *vc, int mode)
G	1882	{
	1883	struct fb_info *info = fbcon_info_from_console(vc->vc_num);
	1884	@@ -1325,6 +1330,9 @@ static void fbcon_cursor(struct vc_data *vc, int mode)
	1885	ops->cursor(vc, info, mode, get_color(vc, info, c, 1),
	1886	get_color(vc, info, c, 0));
	1887	}
	1888	+#else
	1889	+static void fbcon_cursor(struct vc_data *vc, int mode) {}
	1890	+#endif
	1891
	1892	static int scrollback_phys_max = 0;
	1893	static int scrollback_max = 0;