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/********************************************************************************* |
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* Copyright: (C) 2023 LingYun IoT System Studio. All Rights Reserved. |
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* Author: Guo Wenxue <guowenxue@gmail.com> |
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* |
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* Description: This file is W25Qxx SPI Norflash driver on RaspberryPi 40Pin. |
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* |
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* W25QXX RaspberryPi 40Pin |
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* VCC <---> 3.3V(Pin#1) |
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* CS <---> CS(Pin#24) |
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* DO <---> MISO(Pin#21) |
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* GND <---> GND(Pin#9) |
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* CLK <---> SCLK(Pin#23) |
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* DI <---> MOSI(Pin#19) |
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* |
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********************************************************************************/ |
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#include <stdint.h> |
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#include <unistd.h> |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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#include <errno.h> |
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#include <getopt.h> |
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#include <fcntl.h> |
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#include <time.h> |
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#include <sys/ioctl.h> |
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#include <linux/ioctl.h> |
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#include <sys/stat.h> |
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#include <linux/types.h> |
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#include <linux/spi/spidev.h> |
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#include "w25qflash.h" |
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#define CONFIG_SPINOR_DEBUG |
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#ifdef CONFIG_SPINOR_DEBUG |
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#include <stdio.h> |
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#define spinor_print(format,args...) printf(format, ##args) |
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#else |
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#define spinor_print(format,args...) do{} while(0) |
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#endif |
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#define spinor_Delay(delay) usleep(delay*1000) |
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|
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/*+-----------------------+ |
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*| Entry Functions | |
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*+-----------------------+*/ |
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void dump_buf(const char *prompt, char *buf, size_t len); |
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int main (int argc, char **argv) |
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{ |
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spinor_test(); |
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return 0; |
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} |
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|
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/*+-----------------------+ |
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*| SPI API Functions | |
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*+-----------------------+*/ |
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#define SPI_DEV "/dev/spidev0.0" |
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#define SPI_BITS 8 |
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#define SPI_MODE 0//(SPI_CPHA|SPI_CPOL) |
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#define SPI_SPEED 500000 |
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|
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#define SPI_DUMMY_BYTE 0xA5 |
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void spinor_dev_init(struct spi_info *spi) |
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{ |
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uint8_t bits = SPI_BITS; |
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uint32_t speed = SPI_SPEED; |
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uint32_t mode = SPI_MODE; |
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uint32_t request; |
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int ret; |
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spi->hspi = open(SPI_DEV, O_RDWR); |
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if (spi->hspi < 0) |
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{ |
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spinor_print("ERROR: open device %s failure: %s\r\n", SPI_DEV, strerror(errno)); |
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return ; |
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} |
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|
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/* |
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* spi mode |
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*/ |
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request = mode; |
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if( ioctl(spi->hspi, SPI_IOC_WR_MODE32, &mode) < 0 ) |
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{ |
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spinor_print("ERROR: can't set spi mode\n"); |
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return ; |
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} |
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if( ioctl(spi->hspi, SPI_IOC_RD_MODE32, &mode) < 0 ) |
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{ |
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spinor_print("ERROR: can't get spi mode\n"); |
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return ; |
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} |
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if (request != mode) |
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{ |
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spinor_print("WARNING: device does not support requested mode 0x%x\n", request); |
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} |
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/* |
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* bits per word |
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*/ |
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if( ioctl(spi->hspi, SPI_IOC_WR_BITS_PER_WORD, &bits) < 0 ) |
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{ |
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spinor_print("ERROR: can't set bits per word"); |
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return ; |
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} |
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if( ioctl(spi->hspi, SPI_IOC_RD_BITS_PER_WORD, &bits) < 0 ) |
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{ |
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spinor_print("ERROR: can't get bits per word"); |
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return ; |
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} |
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/* |
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* max speed hz |
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*/ |
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if( ioctl(spi->hspi, SPI_IOC_WR_MAX_SPEED_HZ, &speed) < 0 ) |
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{ |
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spinor_print("ERROR: can't set max speed hz"); |
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return ; |
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} |
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if( ioctl(spi->hspi, SPI_IOC_RD_MAX_SPEED_HZ, &speed) < 0 ) |
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{ |
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spinor_print("ERROR: can't get max speed hz"); |
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return ; |
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} |
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printf("spi mode: 0x%x\n", mode); |
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printf("bits per word: %u\n", bits); |
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printf("max speed: %u Hz (%u kHz)\n", speed, speed/1000); |
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} |
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void spi_cs_enable(struct spi_info *spi) |
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{ |
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/* |
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* No need set CS in Linux because the device name /dev/spi0.0 |
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* will choose the first slave device, second slave is spi0.1 |
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*/ |
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(void)0; |
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} |
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void spi_cs_disable(struct spi_info *spi) |
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{ |
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(void)0; |
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} |
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void spi_xcmd(struct spi_info *spi, uint8_t command) |
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{ |
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uint8_t rxbyte; |
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struct spi_ioc_transfer tr = { |
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.tx_buf = (unsigned long)&command, |
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.rx_buf = (unsigned long)&rxbyte, |
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.len = 1, |
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.delay_usecs = 0, |
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.speed_hz = SPI_SPEED, |
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.bits_per_word = SPI_BITS, |
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}; |
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spi->select(spi); |
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if( ioctl(spi->hspi, SPI_IOC_MESSAGE(1), &tr) < 0 ) |
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{ |
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spinor_print("ERROR: can't send spi message:%s\n", strerror(errno)); |
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} |
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spi->deselect(spi); |
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return; |
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} |
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void spi_xfer(struct spi_info *spi, uint8_t *send_buf, uint8_t *recv_buf, int bytes) |
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{ |
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struct spi_ioc_transfer tr = { |
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.tx_buf = (unsigned long)send_buf, |
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.rx_buf = (unsigned long)recv_buf, |
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.len = bytes, |
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.delay_usecs = 0, |
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.speed_hz = SPI_SPEED, |
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.bits_per_word = SPI_BITS, |
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}; |
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spi->select(spi); |
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if( ioctl(spi->hspi, SPI_IOC_MESSAGE(1), &tr) < 0 ) |
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{ |
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spinor_print("ERROR: can't send spi message:%s\n", strerror(errno)); |
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} |
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spi->deselect(spi); |
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return; |
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} |
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#define SPI_INFO(_hspi, _cs_gpio, _cs_pin) {\ |
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.hspi = _hspi, \ |
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.select = spi_cs_enable, \ |
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.deselect = spi_cs_disable, \ |
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.xcmd = spi_xcmd, \ |
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.xfer = spi_xfer, \ |
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} |
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static struct spi_info spinor_spi = SPI_INFO(-1, W25Q_CS_PORT, W25Q_CS_PIN); |
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/*+-----------------------+ |
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*| W25Q SPI Norflash ID | |
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*+-----------------------+*/ |
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#define W25Q_PAGSIZE 256 /* 1Page=256B */ |
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#define W25Q_SECSIZE 4096 /* 1Sector=16Pages=4KB */ |
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#define W25Q_BLKSIZE 65536 /* 1Block=16Sector=64KB */ |
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#define ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0])) |
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/* JEDEC ID the 3rd bytes is the storage capacity */ |
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#pragma GCC diagnostic ignored "-Wshift-count-overflow" |
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#define CAPCITY_ID(id) (1UL<<(id&0xFF)) |
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#define NOR_INFO(_name, _jedec_id) \ |
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.name = _name, \ |
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.jedec_id = _jedec_id, \ |
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.block_size = W25Q_BLKSIZE, \ |
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.sector_size= W25Q_SECSIZE, \ |
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.page_size = W25Q_PAGSIZE, \ |
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.capacity = CAPCITY_ID(_jedec_id), \ |
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.n_blocks = CAPCITY_ID(_jedec_id)/W25Q_BLKSIZE, \ |
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.n_sectors = CAPCITY_ID(_jedec_id)/W25Q_SECSIZE, \ |
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.n_pages = CAPCITY_ID(_jedec_id)/W25Q_PAGSIZE, \ |
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static struct flash_info spinor_ids[] = { |
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{ NOR_INFO("W25Q512", 0xef4020) }, |
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{ NOR_INFO("W25Q256", 0xef4019) }, |
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{ NOR_INFO("W25Q128", 0xef4018) }, |
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{ NOR_INFO("W25Q64", 0xef4017) }, |
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{ NOR_INFO("W25Q32", 0xef4016) }, |
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{ NOR_INFO("W25Q16", 0xef4015) }, |
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{ NOR_INFO("W25Q80", 0xef4014) }, |
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{ NOR_INFO("W25Q40", 0xef4013) }, |
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{ NOR_INFO("W25Q20", 0xef4012) }, |
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{ NOR_INFO("W25Q10", 0xef4011) }, |
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}; |
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/*+-------------------------------+ |
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*| SPI Norflash HighLevel API | |
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*+-------------------------------+*/ |
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/* SPI Norflash API test function */ |
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void spinor_test(void) |
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{ |
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spinor_info_t spinor; |
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int i; |
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uint8_t buf[W25Q_PAGSIZE*2]; |
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if( spinor_init(&spinor) < 0 ) |
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return ; |
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//spinor_erase_chip(&spinor); |
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//spinor_erase_block(&spinor, 1, W25Q_BLKSIZE); |
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spinor_erase_sector(&spinor, 1, W25Q_SECSIZE); |
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memset(buf, 0, sizeof(buf)); |
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spinor_read(&spinor, 0, buf, sizeof(buf)); |
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dump_buf("<<<Read data after erase:\n", (char *)buf, sizeof(buf)); |
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/* Read/Write data test on address not page align */ |
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for(i=0; i<sizeof(buf); i++) |
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buf[i] = i; |
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spinor_write(&spinor, 16, buf, W25Q_PAGSIZE); |
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memset(buf, 0, sizeof(buf)); |
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spinor_read(&spinor, 0, buf, W25Q_PAGSIZE*2); |
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dump_buf("<<<Read data after write:\n", (char *)buf, sizeof(buf)); |
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return ; |
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} |
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/* Initial SPI and detect the flash chip. */ |
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int spinor_init(struct spinor_info *spinor) |
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{ |
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spinor->spi = &spinor_spi; |
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spinor_dev_init(spinor->spi); |
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if( !spinor_detect_by_jedec(spinor) ) |
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return -1; |
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printf("Norflash %s detected, capacity %llu KB, %u blocks, %u sectors, %u pages.\r\n", |
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spinor->flash->name, spinor->flash->capacity>>10, |
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spinor->flash->n_blocks, spinor->flash->n_sectors, spinor->flash->n_pages); |
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return 0; |
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} |
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|
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/* Description: Erase whole flash chip. |
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* Reference : P60, 8.2.32 Chip Erase (C7h / 60h) |
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*/ |
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int spinor_erase_chip(struct spinor_info *spinor) |
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{ |
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struct spi_info *spi = spinor->spi; |
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while (spinor->lock == 1) |
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spinor_Delay(1); |
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spinor->lock = 1; |
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#ifdef CONFIG_SPINOR_DEBUG |
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printf("Norflash EraseChip Begin...\r\n"); |
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#endif |
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spinor_write_enable(spi); |
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spi->xcmd(spi, SPINOR_OP_CHIP_ERASE); |
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spinor_WaitForWriteEnd(spi); |
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#ifdef CONFIG_SPINOR_DEBUG |
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printf("Norflash EraseChip done.\r\n"); |
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#endif |
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spinor_Delay(10); |
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spinor->lock = 0; |
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return 0; |
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} |
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/* Description: Erase blocks by 64KiB, |
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* Reference : P59, 8.2.31 64KB Block Erase with 4-Byte Address (DCh) |
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* @address is the erase start physical address, which can be not block alignment such as 0x10001. |
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* @size is the erase size, which can be larger than a block such as 4097, and it will erase 2 blocks; |
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*/ |
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int spinor_erase_block(struct spinor_info *spinor, uint32_t address, uint32_t size) |
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{ |
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struct spi_info *spi = spinor->spi; |
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struct flash_info *flash = spinor->flash; |
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uint32_t block, first, last; |
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uint32_t addr; |
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uint8_t buf[5]; |
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int bytes = 0; |
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while (spinor->lock == 1) |
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spinor_Delay(1); |
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spinor->lock = 1; |
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/* find first and last erase block */ |
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first = address / flash->block_size; |
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last = (address+size-1) / flash->block_size; |
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#ifdef CONFIG_SPINOR_DEBUG |
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printf("Norflash Erase %d Bytes Block@0x%x Begin...\r\n", size, address); |
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#endif |
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/* start erase all the blocks */ |
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for( block=first; block<=last; block++) |
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{ |
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addr = block * flash->sector_size; |
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#ifdef CONFIG_SPINOR_DEBUG |
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printf("Norflash Erase Block@%x ...\r\n", addr); |
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#endif |
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spinor_WaitForWriteEnd(spi); |
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spinor_write_enable(spi); |
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if (spinor->flash->n_blocks >= 512 ) /* larger than W25Q256 */ |
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{ |
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buf[bytes++] = SPINOR_OP_BE_4K_4B; |
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buf[bytes++] = (addr & 0xFF000000) >> 24; |
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} |
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else |
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{ |
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buf[bytes++] = SPINOR_OP_BE_4K; |
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} |
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buf[bytes++] = (addr & 0xFF0000) >> 16 ; |
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buf[bytes++] = (addr & 0xFF00) >> 8 ; |
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buf[bytes++] = (addr & 0xFF); |
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spi->xfer(spi, buf, NULL, bytes); |
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spinor_WaitForWriteEnd(spi); |
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} |
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#ifdef CONFIG_SPINOR_DEBUG |
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printf("Norflash EraseBlock@0x%x done.\r\n", address); |
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spinor_Delay(100); |
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#endif |
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spinor_Delay(1); |
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spinor->lock = 0; |
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return 0; |
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} |
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/* Description: Erase sectors by 4KiB |
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* Reference : P56, 8.2.28 Sector Erase with 4-Byte Address (21h) |
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* @address is the erase start physical address, which can be not sector alignment such as 0x1001. |
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* @size is the erase size, which can be larger than a sector such as 4097, and it will erase 2 sectors; |
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*/ |
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int spinor_erase_sector(struct spinor_info *spinor, uint32_t address, uint32_t size) |
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{ |
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struct spi_info *spi = spinor->spi; |
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struct flash_info *flash = spinor->flash; |
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uint32_t sector, first, last; |
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uint32_t addr; |
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uint8_t buf[5]; |
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int bytes = 0; |
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while (spinor->lock == 1) |
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spinor_Delay(1); |
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spinor->lock = 1; |
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/* find first and last erase sector */ |
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first = address / flash->sector_size; |
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last = (address+size-1) / flash->sector_size; |
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#ifdef CONFIG_SPINOR_DEBUG |
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printf("Norflash Erase %d Bytes Sector@0x%x Begin...\r\n", size, address); |
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#endif |
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/* start erase all the sectors */ |
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for( sector=first; sector<=last; sector++) |
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{ |
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addr = sector * flash->sector_size; |
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#ifdef CONFIG_SPINOR_DEBUG |
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printf("Norflash Erase Sector@%x ...\r\n", addr); |
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#endif |
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spinor_WaitForWriteEnd(spi); |
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spinor_write_enable(spi); |
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if (spinor->flash->n_blocks >= 512 ) /* larger than W25Q256 */ |
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{ |
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buf[bytes++] = SPINOR_OP_SE_4B; |
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buf[bytes++] = (addr & 0xFF000000) >> 24; |
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} |
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else |
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{ |
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buf[bytes++] = SPINOR_OP_SE; |
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} |
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buf[bytes++] = (addr & 0xFF0000) >> 16 ; |
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buf[bytes++] = (addr & 0xFF00) >> 8 ; |
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buf[bytes++] = (addr & 0xFF); |
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spi->xfer(spi, buf, NULL, bytes); |
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|
|
451 |
spinor_WaitForWriteEnd(spi); |
|
452 |
} |
|
453 |
|
|
454 |
#ifdef CONFIG_SPINOR_DEBUG |
|
455 |
printf("Norflash EraseSector@0x%x done.\r\n", address); |
|
456 |
#endif |
|
457 |
|
|
458 |
spinor_Delay(1); |
|
459 |
spinor->lock = 0; |
|
460 |
|
|
461 |
return 0; |
|
462 |
} |
|
463 |
|
|
464 |
/* P32: 10.2.14 Page Program (02h) */ |
|
465 |
int spinor_write(struct spinor_info *spinor, uint32_t address, uint8_t *data, uint32_t size) |
|
466 |
{ |
|
467 |
struct spi_info *spi = spinor->spi; |
|
468 |
struct flash_info *flash = spinor->flash; |
|
469 |
uint32_t page, first, last; |
|
470 |
uint32_t addr, ofset, len; |
|
471 |
uint8_t buf[W25Q_PAGSIZE+5]; |
|
472 |
int bytes = 0; |
|
473 |
|
|
474 |
if( address+size > spinor->flash->capacity ) |
|
475 |
return -1; |
|
476 |
|
|
477 |
while (spinor->lock == 1) |
|
478 |
spinor_Delay(1); |
|
479 |
|
|
480 |
spinor->lock = 1; |
|
481 |
|
|
482 |
/* find first and last write page */ |
|
483 |
first = address / flash->page_size; |
|
484 |
last = (address+size-1) / flash->page_size; |
|
485 |
|
|
486 |
#ifdef CONFIG_SPINOR_DEBUG |
|
487 |
printf("Norflash Write %d Bytes to addr@0x%x Begin...\r\n", size, address); |
|
488 |
#endif |
|
489 |
|
|
490 |
/* address in page and offset in buffer */ |
|
491 |
addr = address; |
|
492 |
ofset = 0; |
|
493 |
|
|
494 |
/* start write all the pages */ |
|
495 |
for( page=first; page<=last; page++) |
|
496 |
{ |
|
497 |
len = flash->page_size - (addr%flash->page_size); |
|
498 |
len = len > size ? size : len; |
|
499 |
bytes = 0; |
|
500 |
|
|
501 |
#ifdef CONFIG_SPINOR_DEBUG |
|
502 |
printf("Norflash write addr@0x%x, %u bytes\r\n", addr, len); |
|
503 |
#endif |
|
504 |
|
|
505 |
spinor_WaitForWriteEnd(spi); |
|
506 |
spinor_write_enable(spi); |
|
507 |
|
|
508 |
if (spinor->flash->n_blocks >= 512 ) |
|
509 |
{ |
|
510 |
buf[bytes++] = SPINOR_OP_PP_4B; |
|
511 |
buf[bytes++] = (addr & 0xFF000000) >> 24; |
|
512 |
} |
|
513 |
else |
|
514 |
{ |
|
515 |
buf[bytes++] = SPINOR_OP_PP; |
|
516 |
} |
|
517 |
buf[bytes++] = (addr & 0xFF0000) >> 16 ; |
|
518 |
buf[bytes++] = (addr & 0xFF00) >> 8 ; |
|
519 |
buf[bytes++] = (addr & 0xFF); |
|
520 |
|
|
521 |
/* send command and data */ |
|
522 |
memcpy(&buf[bytes], data+ofset, len); |
|
523 |
bytes += len; |
|
524 |
spi->xfer(spi, buf, NULL, bytes); |
|
525 |
|
|
526 |
spinor_WaitForWriteEnd(spi); |
|
527 |
|
|
528 |
addr += len; |
|
529 |
ofset += len; |
|
530 |
size -= len; |
|
531 |
} |
|
532 |
|
|
533 |
#ifdef CONFIG_SPINOR_DEBUG |
|
534 |
printf("Norflash WriteByte@0x%x done.\r\n", address); |
|
535 |
#endif |
|
536 |
|
|
537 |
spinor_Delay(1); |
|
538 |
spinor->lock = 0; |
|
539 |
|
|
540 |
return 0; |
|
541 |
} |
|
542 |
|
|
543 |
/* Description: The Fast Read instruction can read the entire memory chip. |
|
544 |
* Reference : P41, 8.2.13 Fast Read with 4-Byte Address (0Ch) |
|
545 |
* @address is the read start physical address, which can be not page alignment such as 0x101. |
|
546 |
* @size is the read size, which can be larger than a page such as 257, and it will read 2 pages; |
|
547 |
*/ |
|
548 |
int spinor_read(struct spinor_info *spinor, uint32_t address, uint8_t *data, uint32_t size) |
|
549 |
{ |
|
550 |
struct spi_info *spi = spinor->spi; |
|
551 |
uint8_t buf[W25Q_PAGSIZE+6]; |
|
552 |
int bytes = 0; |
|
553 |
int ofset; |
|
554 |
uint32_t addr = address; |
|
555 |
|
|
556 |
if( address+size > spinor->flash->capacity ) |
|
557 |
return -1; |
|
558 |
|
|
559 |
while (spinor->lock == 1) |
|
560 |
spinor_Delay(1); |
|
561 |
|
|
562 |
spinor->lock = 1; |
|
563 |
|
|
564 |
#ifdef CONFIG_SPINOR_DEBUG |
|
565 |
printf("Norflash Read %d Bytes from addr@0x%x Begin...\r\n", size, address); |
|
566 |
#endif |
|
567 |
|
|
568 |
while( size > 0 ) |
|
569 |
{ |
|
570 |
bytes = size>W25Q_PAGSIZE ? W25Q_PAGSIZE : size; |
|
571 |
memset(buf, SPI_DUMMY_BYTE, sizeof(buf)); |
|
572 |
ofset = 0; |
|
573 |
|
|
574 |
#ifdef CONFIG_SPINOR_DEBUG |
|
575 |
printf("Norflash read addr@0x%x, %d bytes\r\n", addr, bytes); |
|
576 |
#endif |
|
577 |
|
|
578 |
/* send instruction and address */ |
|
579 |
if (spinor->flash->n_blocks >= 512 ) |
|
580 |
{ |
|
581 |
buf[ofset++] = SPINOR_OP_READ_FAST_4B; |
|
582 |
buf[ofset++] = (addr & 0xFF000000) >> 24; |
|
583 |
} |
|
584 |
else |
|
585 |
{ |
|
586 |
buf[ofset++] = SPINOR_OP_READ_FAST; |
|
587 |
} |
|
588 |
buf[ofset++] = (addr & 0xFF0000) >> 16 ; |
|
589 |
buf[ofset++] = (addr & 0xFF00) >> 8 ; |
|
590 |
buf[ofset++] = (addr & 0xFF); |
|
591 |
|
|
592 |
ofset += 1; /* Skip first dummy byte */ |
|
593 |
|
|
594 |
/* Send command and read data out */ |
|
595 |
spi->xfer(spi, buf, buf, ofset+bytes); |
|
596 |
memcpy(data, &buf[ofset], bytes); |
|
597 |
|
|
598 |
size -= bytes; |
|
599 |
addr += bytes; |
|
600 |
data += bytes; |
|
601 |
} |
|
602 |
|
|
603 |
#ifdef CONFIG_SPINOR_DEBUG |
|
604 |
printf("Norflash ReadBytes@0x%x done.\r\n", address); |
|
605 |
#endif |
|
606 |
spinor->lock = 0; |
|
607 |
|
|
608 |
return 0; |
|
609 |
} |
|
610 |
|
|
611 |
/*+-------------------------------+ |
|
612 |
*| SPI Norflash LowLevel API | |
|
613 |
*+-------------------------------+*/ |
|
614 |
|
|
615 |
/* Detect the norflash by JEDEC ID */ |
|
616 |
int spinor_detect_by_jedec(struct spinor_info *spinor) |
|
617 |
{ |
|
618 |
uint32_t jedec_id; |
|
619 |
int i, found = 0; |
|
620 |
|
|
621 |
jedec_id = spinor_read_jedecid(spinor->spi); |
|
622 |
|
|
623 |
for(i=0; i<ARRAY_SIZE(spinor_ids); i++) |
|
624 |
{ |
|
625 |
if(spinor_ids[i].jedec_id == jedec_id) |
|
626 |
{ |
|
627 |
found = 1; |
|
628 |
spinor->flash = &spinor_ids[i]; |
|
629 |
break; |
|
630 |
} |
|
631 |
} |
|
632 |
|
|
633 |
printf("Detect JEDEC ID[0x%x], Norflash %s found\r\n", jedec_id, found?spinor->flash->name:"not"); |
|
634 |
return found; |
|
635 |
} |
|
636 |
|
|
637 |
/* Description: Read the chipset UNIQUE ID. |
|
638 |
* Reference : P68, 8.2.40 Read Unique ID Number (4Bh) |
|
639 |
*/ |
|
640 |
int spinor_read_uniqid(struct spi_info *spi, uint8_t *uniq_id) |
|
641 |
{ |
|
642 |
uint8_t i; |
|
643 |
uint8_t buf[13]; /* Instruction(1B) + Dummy(4B) + UID(8B)*/ |
|
644 |
|
|
645 |
if( !uniq_id ) |
|
646 |
return -1; |
|
647 |
|
|
648 |
buf[0] = SPINOR_OP_RDUID; |
|
649 |
spi->xfer(spi, buf, buf, sizeof(buf)); |
|
650 |
|
|
651 |
/* Skip 4 bytes dummy bytes */ |
|
652 |
for (i=0; i<8; i++) |
|
653 |
{ |
|
654 |
uniq_id[i] = buf[5+i]; |
|
655 |
} |
|
656 |
|
|
657 |
return 0; |
|
658 |
} |
|
659 |
|
|
660 |
/* Description: Read the chipset JEDEC ID. |
|
661 |
* Reference : P69, 8.2.41 Read JEDEC ID (9Fh) |
|
662 |
*/ |
|
663 |
uint32_t spinor_read_jedecid(struct spi_info *spi) |
|
664 |
{ |
|
665 |
uint32_t jedec_id = 0x0; |
|
666 |
uint8_t buf[4]; |
|
667 |
|
|
668 |
buf[0] = SPINOR_OP_RDID; |
|
669 |
spi->xfer(spi, buf, buf, sizeof(buf)); |
|
670 |
jedec_id = (buf[1] << 16) | (buf[2] << 8) | buf[3]; |
|
671 |
|
|
672 |
return jedec_id; |
|
673 |
} |
|
674 |
|
|
675 |
/* Description: Write Enable |
|
676 |
* Reference : P31, 8.2.1 Write Enable (06h) |
|
677 |
*/ |
|
678 |
void spinor_write_enable(struct spi_info *spi) |
|
679 |
{ |
|
680 |
spi->xcmd(spi, SPINOR_OP_WREN); |
|
681 |
|
|
682 |
spinor_Delay(1); |
|
683 |
} |
|
684 |
|
|
685 |
/* Description: Write Disable |
|
686 |
* Reference : P32, 8.2.3 Write Disable (04h) |
|
687 |
*/ |
|
688 |
void spinor_write_disable(struct spi_info *spi) |
|
689 |
{ |
|
690 |
spi->xcmd(spi, SPINOR_OP_WRDI); |
|
691 |
|
|
692 |
spinor_Delay(1); |
|
693 |
} |
|
694 |
|
|
695 |
/* Description: Read Status Register |
|
696 |
* Reference : P32, 8.2.4 Read Status Register-1 (05h), Status Register-2 (35h) & Status Register-3 (15h) |
|
697 |
*/ |
|
698 |
uint8_t spinor_read_status_reg(struct spi_info *spi, uint8_t reg) |
|
699 |
{ |
|
700 |
uint8_t cmd[REG_STATUS_MAX] = { SPINOR_OP_RDSR1 , SPINOR_OP_RDSR2, SPINOR_OP_RDSR3 }; /* Status Register 1~3 */ |
|
701 |
uint8_t buf[2]; |
|
702 |
|
|
703 |
if( reg>= REG_STATUS_MAX ) |
|
704 |
return 0xFF; |
|
705 |
|
|
706 |
buf[0] = cmd[reg]; |
|
707 |
buf[1] = SPI_DUMMY_BYTE; |
|
708 |
spi->xfer(spi, buf, buf, sizeof(buf)); |
|
709 |
|
|
710 |
return buf[1]; |
|
711 |
} |
|
712 |
|
|
713 |
/* Description: Write Status Register |
|
714 |
* Reference : P33, 8.2.5 Write Status Register-1 (01h), Status Register-2 (31h) & Status Register-3 (11h) |
|
715 |
*/ |
|
716 |
void spinor_write_status_reg(struct spi_info *spi, uint8_t reg, uint8_t value) |
|
717 |
{ |
|
718 |
uint8_t cmd[REG_STATUS_MAX] = { SPINOR_OP_WRSR1 , SPINOR_OP_WRSR2, SPINOR_OP_WRSR3 }; /* Status Register 1~3 */ |
|
719 |
uint8_t buf[2]; |
|
720 |
|
|
721 |
if( reg>= REG_STATUS_MAX ) |
|
722 |
return ; |
|
723 |
|
|
724 |
buf[0] = cmd[reg]; |
|
725 |
buf[1] = value; |
|
726 |
spi->xfer(spi, buf, buf, sizeof(buf)); |
|
727 |
} |
|
728 |
|
|
729 |
/* Description: Wait flash program/erase finished by read Status Register for BUSY bit |
|
730 |
* Reference : P15, 7.1 Status Registers |
|
731 |
*/ |
|
732 |
void spinor_WaitForWriteEnd(struct spi_info *spi) |
|
733 |
{ |
|
734 |
uint8_t buf[2]; |
|
735 |
|
|
736 |
spinor_Delay(1); |
|
737 |
|
|
738 |
do |
|
739 |
{ |
|
740 |
buf[0] = SPINOR_OP_RDSR1; |
|
741 |
buf[1] = SPI_DUMMY_BYTE; |
|
742 |
spi->xfer(spi, buf, buf, sizeof(buf)); |
|
743 |
|
|
744 |
spinor_Delay(1); |
|
745 |
} while ((buf[1] & 0x01) == 0x01); |
|
746 |
} |
|
747 |
|
|
748 |
/*+----------------+ |
|
749 |
*| dump_buf | |
|
750 |
*+----------------+*/ |
|
751 |
|
|
752 |
void print_buf(const char *prompt, uint8_t *buf, int size) |
|
753 |
{ |
|
754 |
int i; |
|
755 |
|
|
756 |
if( !buf ) |
|
757 |
{ |
|
758 |
return ; |
|
759 |
} |
|
760 |
|
|
761 |
if( prompt ) |
|
762 |
{ |
|
763 |
printf("%-32s ", prompt); |
|
764 |
} |
|
765 |
|
|
766 |
for(i=0; i<size; i++) |
|
767 |
{ |
|
768 |
printf("%02X ", buf[i]); |
|
769 |
} |
|
770 |
printf("\r\n"); |
|
771 |
|
|
772 |
return ; |
|
773 |
} |
|
774 |
|
|
775 |
#define LINELEN 81 |
|
776 |
#define CHARS_PER_LINE 16 |
|
777 |
static char *print_char = |
|
778 |
" " |
|
779 |
" " |
|
780 |
" !\"#$%&'()*+,-./" |
|
781 |
"0123456789:;<=>?" |
|
782 |
"@ABCDEFGHIJKLMNO" |
|
783 |
"PQRSTUVWXYZ[\\]^_" |
|
784 |
"`abcdefghijklmno" |
|
785 |
"pqrstuvwxyz{|}~ " |
|
786 |
" " |
|
787 |
" " |
|
788 |
" ???????????????" |
|
789 |
"????????????????" |
|
790 |
"????????????????" |
|
791 |
"????????????????" |
|
792 |
"????????????????" |
|
793 |
"????????????????"; |
|
794 |
|
|
795 |
void dump_buf(const char *prompt, char *buf, size_t len) |
|
796 |
{ |
|
797 |
int rc; |
|
798 |
int idx; |
|
799 |
char prn[LINELEN]; |
|
800 |
char lit[CHARS_PER_LINE + 2]; |
|
801 |
char hc[4]; |
|
802 |
short line_done = 1; |
|
803 |
|
|
804 |
if( prompt ) |
|
805 |
printf("%s", prompt); |
|
806 |
|
|
807 |
rc = len; |
|
808 |
idx = 0; |
|
809 |
lit[CHARS_PER_LINE] = '\0'; |
|
810 |
|
|
811 |
while (rc > 0) |
|
812 |
{ |
|
813 |
if (line_done) |
|
814 |
snprintf(prn, LINELEN, "%08X: ", idx); |
|
815 |
|
|
816 |
do |
|
817 |
{ |
|
818 |
unsigned char c = buf[idx]; |
|
819 |
snprintf(hc, 4, "%02X ", c); |
|
820 |
strncat(prn, hc, LINELEN); |
|
821 |
|
|
822 |
lit[idx % CHARS_PER_LINE] = print_char[c]; |
|
823 |
} |
|
824 |
while (--rc > 0 && (++idx % CHARS_PER_LINE != 0)); |
|
825 |
|
|
826 |
line_done = (idx % CHARS_PER_LINE) == 0; |
|
827 |
if (line_done) |
|
828 |
{ |
|
829 |
printf("%s %s\r\n", prn, lit); |
|
830 |
} |
|
831 |
} |
|
832 |
|
|
833 |
if (!line_done) |
|
834 |
{ |
|
835 |
int ldx = idx % CHARS_PER_LINE; |
|
836 |
lit[ldx++] = print_char[(int)buf[idx]]; |
|
837 |
lit[ldx] = '\0'; |
|
838 |
|
|
839 |
while ((++idx % CHARS_PER_LINE) != 0) |
|
840 |
strncat(prn, " ", sizeof(prn)-strlen(prn)); |
|
841 |
|
|
842 |
printf("%s %s\r\n", prn, lit); |
|
843 |
|
|
844 |
} |
|
845 |
} |