| | |
| | | +}; |
| | | diff --git a/arch/arm/dts/igkboard-imx8mp.dts b/arch/arm/dts/igkboard-imx8mp.dts |
| | | new file mode 100644 |
| | | index 00000000..523d5f32 |
| | | index 00000000..cddc9470 |
| | | --- /dev/null |
| | | +++ b/arch/arm/dts/igkboard-imx8mp.dts |
| | | @@ -0,0 +1,486 @@ |
| | | @@ -0,0 +1,475 @@ |
| | | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| | | +/* |
| | | + * Copyright 2023 LingYun IoT System Studio. |
| | |
| | | + reg = <0x0 0x80000000 0 0x80000000>; |
| | | + }; |
| | | + |
| | | + /* SD2_RESET_B for TF card */ |
| | | + reg_usdhc2_vmmc: regulator-usdhc2 { |
| | | + compatible = "regulator-fixed"; |
| | | + regulator-name = "VSD_3V3"; |
| | | + regulator-min-microvolt = <3300000>; |
| | | + regulator-max-microvolt = <3300000>; |
| | | + gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; |
| | | + enable-active-high; |
| | | + startup-delay-us = <100>; |
| | | + off-on-delay-us = <12000>; |
| | | + }; |
| | | + |
| | | + leds { |
| | | + compatible = "gpio-leds"; |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_gpio_led>; |
| | | + pinctrl-0 = <&pinctrl_leds>; |
| | | + status = "okay"; |
| | | + |
| | | + sysled { |
| | | + label = "sysled"; |
| | |
| | | + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; |
| | | + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; |
| | | + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; |
| | | + vmmc-supply = <®_usdhc2_vmmc>; |
| | | + bus-width = <4>; |
| | | + no-1-8-v; |
| | | + status = "okay"; |
| | |
| | | + | Ethernet | |
| | | + +------------------------+*/ |
| | | + |
| | | +/* First 1000Mbps Ethernet For TSN on ENET */ |
| | | +&eqos { |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_eqos>; |
| | | + phy-mode = "rgmii-id"; |
| | | + phy-handle = <ðphy0>; |
| | | + snps,reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; |
| | | + snps,reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; |
| | | + snps,reset-delays-us = <100000 200000 150000>; |
| | | + status = "okay"; |
| | | + |
| | |
| | | + #address-cells = <1>; |
| | | + #size-cells = <0>; |
| | | + |
| | | + ethphy0: ethernet-phy@1 { |
| | | + ethphy0: ethernet-phy@0 { /* YT8521SH-CA */ |
| | | + compatible = "ethernet-phy-ieee802.3-c22"; |
| | | + reg = <0>; |
| | | + eee-broken-1000t; |
| | |
| | | + }; |
| | | +}; |
| | | + |
| | | +/* Second 1000Mbps Ethernet on ENET1 */ |
| | | +&fec { |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_fec>; |
| | |
| | | + phy-handle = <ðphy1>; |
| | | + phy-reset-duration = <200>; |
| | | + phy-reset-post-delay = <150>; |
| | | + phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; |
| | | + phy-reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; |
| | | + |
| | | + fsl,magic-packet; |
| | | + status = "okay"; |
| | |
| | | + #address-cells = <1>; |
| | | + #size-cells = <0>; |
| | | + |
| | | + ethphy1: ethernet-phy@1 { |
| | | + ethphy1: ethernet-phy@0 { /* YT8521SH-CA */ |
| | | + compatible = "ethernet-phy-ieee802.3-c22"; |
| | | + reg = <0>; |
| | | + eee-broken-1000t; |
| | |
| | | +&iomuxc { |
| | | + pinctrl-names = "default"; |
| | | + |
| | | + pinctrl_gpio_led: gpioledgrp { |
| | | + pinctrl_leds: ledsgrp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x140 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_wdog: wdoggrp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6 |
| | | + >; |
| | | + }; |
| | | + |
| | |
| | | + pinctrl_pmic: pmicirq { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x41 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_usdhc2_gpio: usdhc2grp-gpio { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 |
| | | + >; |
| | | + }; |
| | | + |
| | |
| | | + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 |
| | | + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 |
| | | + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_usdhc2_gpio: usdhc2grp-gpio { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 |
| | | + MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41 |
| | | + >; |
| | | + }; |
| | | + |
| | |
| | | + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16 |
| | | + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16 |
| | | + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16 |
| | | + MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x10 |
| | | + MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x22 |
| | | + >; |
| | | + }; |
| | | + |
| | |
| | | + MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16 |
| | | + MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16 |
| | | + MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16 |
| | | + MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x10 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_wdog: wdoggrp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6 |
| | | + MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x11 |
| | | + >; |
| | | + }; |
| | | +}; |
| | |
| | | +} |
| | | diff --git a/configs/igkboard-imx8mp_defconfig b/configs/igkboard-imx8mp_defconfig |
| | | new file mode 100644 |
| | | index 00000000..40c3b634 |
| | | index 00000000..b063a6e8 |
| | | --- /dev/null |
| | | +++ b/configs/igkboard-imx8mp_defconfig |
| | | @@ -0,0 +1,199 @@ |
| | | @@ -0,0 +1,166 @@ |
| | | +CONFIG_ARM=y |
| | | +CONFIG_ARCH_IMX8M=y |
| | | +CONFIG_TEXT_BASE=0x40200000 |
| | |
| | | +CONFIG_SPL_GPIO=y |
| | | +CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| | | +CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| | | +CONFIG_IMX_BOOTAUX=y |
| | | +CONFIG_NR_DRAM_BANKS=3 |
| | | +CONFIG_ENV_SIZE=0x4000 |
| | | +CONFIG_ENV_OFFSET=0x700000 |
| | | +CONFIG_ENV_SECT_SIZE=0x10000 |
| | | +CONFIG_SYS_MEMTEST_START=0x60000000 |
| | | +CONFIG_SYS_MEMTEST_END=0xC0000000 |
| | | +CONFIG_SYS_I2C_MXC_I2C1=y |
| | | +CONFIG_SYS_I2C_MXC_I2C2=y |
| | | +CONFIG_SYS_I2C_MXC_I2C3=y |
| | | +CONFIG_DM_GPIO=y |
| | | +CONFIG_DEFAULT_DEVICE_TREE="igkboard-imx8mp" |
| | | +CONFIG_SPL_TEXT_BASE=0x920000 |
| | | +CONFIG_TARGET_IGKBOARD_IMX8MP=y |
| | | +CONFIG_SYS_PROMPT="u-boot=> " |
| | | +CONFIG_SPL_SERIAL=y |
| | | +CONFIG_SPL_DRIVERS_MISC=y |
| | | +CONFIG_SPL_STACK=0x96dff0 |
| | | +CONFIG_SPL=y |
| | | +CONFIG_IMX_BOOTAUX=y |
| | | +CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 |
| | | +CONFIG_SYS_LOAD_ADDR=0x40400000 |
| | | +CONFIG_DISTRO_DEFAULTS=y |
| | | +CONFIG_OF_BOARD_FIXUP=y |
| | | +CONFIG_SYS_MEMTEST_START=0x60000000 |
| | | +CONFIG_SYS_MEMTEST_END=0xC0000000 |
| | | +CONFIG_REMAKE_ELF=y |
| | | +CONFIG_SYS_MONITOR_LEN=524288 |
| | | +CONFIG_DEFAULT_DEVICE_TREE="igkboard-imx8mp" |
| | | +CONFIG_BOOTCOMMAND="run distro_bootcmd;run bsp_bootcmd" |
| | | +CONFIG_FIT=y |
| | | +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
| | | +CONFIG_SPL_LOAD_FIT=y |
| | | +# CONFIG_USE_SPL_FIT_GENERATOR is not set |
| | | +CONFIG_REMAKE_ELF=y |
| | | +CONFIG_OF_BOARD_SETUP=y |
| | | +CONFIG_OF_SYSTEM_SETUP=y |
| | | +CONFIG_DISTRO_DEFAULTS=y |
| | | +CONFIG_BOOTCOMMAND="run distro_bootcmd;run bsp_bootcmd" |
| | | +CONFIG_DEFAULT_FDT_FILE="igkboard-imx8mp.dtb" |
| | | +CONFIG_ARCH_MISC_INIT=y |
| | | +CONFIG_BOARD_EARLY_INIT_F=y |
| | |
| | | +CONFIG_SPL_BOARD_INIT=y |
| | | +CONFIG_SPL_BOOTROM_SUPPORT=y |
| | | +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| | | +CONFIG_SPL_STACK=0x96dff0 |
| | | +CONFIG_SYS_SPL_MALLOC=y |
| | | +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y |
| | | +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 |
| | |
| | | +CONFIG_SYS_MAXARGS=64 |
| | | +CONFIG_SYS_CBSIZE=2048 |
| | | +CONFIG_SYS_PBSIZE=2074 |
| | | +# CONFIG_BOOTM_NETBSD is not set |
| | | +CONFIG_SYS_BOOTM_LEN=0x2000000 |
| | | +CONFIG_NR_DRAM_BANKS=3 |
| | | +CONFIG_HUSH_PARSER=y |
| | | +# CONFIG_CMD_EXPORTENV is not set |
| | | +# CONFIG_CMD_IMPORTENV is not set |
| | | +CONFIG_CMD_ERASEENV=y |
| | | +CONFIG_CMD_CRC32=y |
| | | +CONFIG_CRC32_VERIFY=y |
| | | +# CONFIG_BOOTM_NETBSD is not set |
| | | +CONFIG_CMD_MEMTEST=y |
| | | +CONFIG_CMD_CLK=y |
| | | +CONFIG_CMD_FUSE=y |
| | | +CONFIG_CMD_GPIO=y |
| | | +CONFIG_CMD_I2C=y |
| | | +CONFIG_CMD_MMC=y |
| | | +CONFIG_CMD_CACHE=y |
| | | +CONFIG_CMD_REGULATOR=y |
| | | +CONFIG_CMD_MEMTEST=y |
| | | +CONFIG_CMD_EXT2=y |
| | | +CONFIG_CMD_EXT4=y |
| | | +CONFIG_CMD_EXT4_WRITE=y |
| | | +CONFIG_CMD_FAT=y |
| | | +CONFIG_CMD_LED=y |
| | | +CONFIG_CMD_FS_GENERIC=y |
| | | +CONFIG_CMD_NAND_TRIMFFS=y |
| | | +CONFIG_CMD_USB=y |
| | | +CONFIG_CMD_USB_MASS_STORAGE=y |
| | | +CONFIG_CMD_BMP=y |
| | | +CONFIG_CMD_CACHE=y |
| | | +CONFIG_CMD_REGULATOR=y |
| | | +CONFIG_CMD_EXT4_WRITE=y |
| | | +CONFIG_CMD_MTDPARTS=y |
| | | +CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" |
| | | +CONFIG_MTDPARTS_SKIP_INVALID=y |
| | | +CONFIG_CMD_UBI=y |
| | | +CONFIG_OF_CONTROL=y |
| | | +CONFIG_SPL_OF_CONTROL=y |
| | | +CONFIG_ENV_OVERWRITE=y |
| | |
| | | +CONFIG_ENV_IS_IN_NAND=y |
| | | +CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| | | +CONFIG_SYS_MMC_ENV_DEV=1 |
| | | +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
| | | +CONFIG_USE_ETHPRIME=y |
| | | +CONFIG_ETHPRIME="eth1" |
| | | +CONFIG_SPL_DM=y |
| | |
| | | +CONFIG_CLK_COMPOSITE_CCF=y |
| | | +CONFIG_SPL_CLK_IMX8MP=y |
| | | +CONFIG_CLK_IMX8MP=y |
| | | +CONFIG_MXC_GPIO=y |
| | | +CONFIG_DM_PCA953X=y |
| | | +CONFIG_FASTBOOT=y |
| | | +CONFIG_USB_FUNCTION_FASTBOOT=y |
| | | +CONFIG_CMD_FASTBOOT=y |
| | | +CONFIG_ANDROID_BOOT_IMAGE=y |
| | | +CONFIG_FASTBOOT_UUU_SUPPORT=y |
| | | +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 |
| | | +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 |
| | | +CONFIG_FASTBOOT_FLASH=y |
| | | +CONFIG_MXC_GPIO=y |
| | | +CONFIG_DM_PCA953X=y |
| | | +CONFIG_DM_I2C=y |
| | | +CONFIG_SYS_I2C_MXC=y |
| | | +CONFIG_LED=y |
| | | +CONFIG_LED_GPIO=y |
| | | +CONFIG_DM_MMC=y |
| | | +CONFIG_EFI_PARTITION=y |
| | | +CONFIG_SUPPORT_EMMC_BOOT=y |
| | | +CONFIG_MMC_IO_VOLTAGE=y |
| | | +CONFIG_MMC_UHS_SUPPORT=y |
| | | +CONFIG_MMC_HS400_ES_SUPPORT=y |
| | | +CONFIG_MMC_HS400_SUPPORT=y |
| | | +CONFIG_FSL_USDHC=y |
| | | +CONFIG_MTD=y |
| | | +CONFIG_DM_MTD=y |
| | | +CONFIG_MTD_RAW_NAND=y |
| | | +CONFIG_SYS_NAND_USE_FLASH_BBT=y |
| | | +CONFIG_NAND_MXS=y |
| | | +CONFIG_NAND_MXS_DT=y |
| | | +CONFIG_NAND_MXS_USE_MINIMUM_ECC=y |
| | | +CONFIG_SYS_NAND_ONFI_DETECTION=y |
| | | +CONFIG_PHY_REALTEK=y |
| | | +CONFIG_DM_ETH_PHY=y |
| | | +CONFIG_PHY_GIGE=y |
| | | +CONFIG_PHY=y |
| | | +CONFIG_PHY_IMX8MQ_USB=y |
| | | +CONFIG_DWC_ETH_QOS=y |
| | | +CONFIG_DWC_ETH_QOS_IMX=y |
| | | +CONFIG_FEC_MXC=y |
| | | +CONFIG_MII=y |
| | | + |
| | | +CONFIG_PHY=y |
| | | +CONFIG_PHY_IMX8MQ_USB=y |
| | | +CONFIG_PINCTRL=y |
| | | +CONFIG_SPL_PINCTRL=y |
| | | +CONFIG_PINCTRL_IMX8M=y |
| | | +CONFIG_POWER_DOMAIN=y |
| | | +CONFIG_IMX8M_POWER_DOMAIN=y |
| | | +CONFIG_IMX8M_BLK_CTRL=y |
| | | +CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y |
| | | +CONFIG_DM_PMIC=y |
| | | +CONFIG_SPL_DM_PMIC_PCA9450=y |
| | |
| | | +CONFIG_SYSRESET_PSCI=y |
| | | +CONFIG_DM_THERMAL=y |
| | | +CONFIG_IMX_TMU=y |
| | | +CONFIG_USB_TCPC=n |
| | | +CONFIG_USB=y |
| | | +CONFIG_USB_XHCI_HCD=y |
| | | +CONFIG_USB_XHCI_DWC3=y |
| | | +CONFIG_USB_DWC3=y |
| | | +CONFIG_USB_GADGET=y |
| | | +CONFIG_USB_STORAGE=y |
| | | +CONFIG_DM_USB=y |
| | | + |
| | | +CONFIG_OF_LIBFDT_OVERLAY=y |
| | | +CONFIG_USB_GADGET_MANUFACTURER="FSL" |
| | | +CONFIG_USB_GADGET_VENDOR_NUM=0x1fc9 |
| | | +CONFIG_USB_GADGET_PRODUCT_NUM=0x0152 |
| | | +CONFIG_USB_GADGET_DOWNLOAD=y |
| | | +CONFIG_USB_XHCI_HCD=y |
| | | +CONFIG_USB_XHCI_IMX8M=y |
| | | +CONFIG_USB_XHCI_DWC3=y |
| | | +CONFIG_USB_DWC3=y |
| | | +CONFIG_USB_DWC3_GADGET=y |
| | | + |
| | | +CONFIG_OF_BOARD_FIXUP=y |
| | | +CONFIG_OF_BOARD_SETUP=y |
| | | + |
| | | +CONFIG_IMX8M_BLK_CTRL=y |
| | | +CONFIG_VIDEO_IMX_LCDIFV3=y |
| | | +CONFIG_VIDEO_IMX_SEC_DSI=y |
| | | +CONFIG_VIDEO=y |
| | | +CONFIG_VIDEO_LOGO=y |
| | | +CONFIG_SYS_WHITE_ON_BLACK=y |
| | | +CONFIG_VIDEO_LCD_RAYDIUM_RM67191=y |
| | | +CONFIG_VIDEO_IMX_SEC_DSI=y |
| | | +CONFIG_VIDEO_IMX_LCDIFV3=y |
| | | +CONFIG_SPLASH_SCREEN=y |
| | | +CONFIG_SPLASH_SCREEN_ALIGN=y |
| | | +CONFIG_BMP_16BPP=y |
| | | +CONFIG_BMP_24BPP=y |
| | | +CONFIG_BMP_32BPP=y |
| | | +CONFIG_VIDEO_LOGO=y |
| | | +CONFIG_VIDEO_LCD_RAYDIUM_RM67191=y |
| | | +CONFIG_VIDEO_ADV7535=y |
| | | +CONFIG_SYS_WHITE_ON_BLACK=y |
| | | +CONFIG_SPLASH_SCREEN=y |
| | | +CONFIG_SPLASH_SCREEN_ALIGN=y |
| | | +CONFIG_CMD_BMP=y |
| | | + |
| | | +CONFIG_CMD_NAND=y |
| | | +CONFIG_CMD_UBI=y |
| | | +CONFIG_CMD_NAND_TRIMFFS=y |
| | | +CONFIG_MTD_RAW_NAND=y |
| | | +CONFIG_MTD=y |
| | | +CONFIG_DM_MTD=y |
| | | +CONFIG_CMD_MTDPARTS=y |
| | | +CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" |
| | | +CONFIG_MTDPARTS_SKIP_INVALID=y |
| | | +CONFIG_NAND=y |
| | | +CONFIG_NAND_MXS=y |
| | | +CONFIG_NAND_MXS_DT=y |
| | | +CONFIG_NAND_MXS_USE_MINIMUM_ECC=y |
| | | +CONFIG_SYS_NAND_USE_FLASH_BBT=y |
| | | +CONFIG_SYS_NAND_ONFI_DETECTION=y |
| | | +CONFIG_OF_LIBFDT_OVERLAY=y |
| | | diff --git a/diff b/diff |
| | | new file mode 100644 |
| | | index 00000000..9e1d6d4f |