| | |
| | | +dtb-$(CONFIG_ARCH_MXC) += igkboard-imx8mp.dtb |
| | | diff --git a/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts b/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts |
| | | new file mode 100644 |
| | | index 000000000..02267ac4d |
| | | index 000000000..7f3e9a74a |
| | | --- /dev/null |
| | | +++ b/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts |
| | | @@ -0,0 +1,531 @@ |
| | | @@ -0,0 +1,613 @@ |
| | | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| | | +/* |
| | | + * Device Tree Source for LingYun IGKBoard(IoT Gateway Kits Board) - imx8mp |
| | |
| | | + label = "blueled"; |
| | | + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; |
| | | + default-state = "on"; |
| | | + linux,default-trigger = "timer"; |
| | | + }; |
| | | + }; |
| | | + |
| | |
| | | +}; |
| | | + |
| | | +/*+------------------------+ |
| | | + | Misc Devices | |
| | | + +------------------------+*/ |
| | | + |
| | | +/* Buzzer */ |
| | | +&pwm1 { |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_pwm1>; |
| | | + status = "okay"; |
| | | +}; |
| | | + |
| | | +/*+------------------------+ |
| | | + | MikroBUS interface | |
| | | + +------------------------+*/ |
| | | + |
| | | +/* Same as RPi 40Pin extend interface: #32 */ |
| | | +&pwm3 { |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_pwm3>; |
| | | + status = "okay"; |
| | | +}; |
| | | + |
| | | +/* Same as RPi 40Pin extend interface: #19, #21, #23, #24 */ |
| | | +&uart1 { |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_uart1>; |
| | | + assigned-clocks = <&clk IMX8MP_CLK_UART1>; |
| | | + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; |
| | | + status = "okay"; |
| | | +}; |
| | | + |
| | | +/* Same as RPi 40Pin extend interface */ |
| | | +&ecspi2 { |
| | | + #address-cells = <1>; |
| | | + #size-cells = <0>; |
| | | + fsl,spi-num-chipselects = <1>; |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_ecspi2>; |
| | | + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; |
| | | + status = "okay"; |
| | | + |
| | | + spidev@0 { |
| | | + compatible = "fsl,spidev", "semtech,sx1301"; |
| | | + reg = <0>; |
| | | + spi-max-frequency = <2000000>; |
| | | + }; |
| | | +}; |
| | | + |
| | | +/* Same as RPi 40Pin extend interface: #3, #5 */ |
| | | +&i2c5 { |
| | | + clock-frequency = <100000>; |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_i2c5>; |
| | | + status = "okay"; |
| | | +}; |
| | | + |
| | | +/*+------------------------+ |
| | | + | PCA9450CHN PMIC | |
| | | + +------------------------+*/ |
| | | + |
| | | +&i2c1 { |
| | | + clock-frequency = <400000>; |
| | | + pinctrl-names = "default", "gpio"; |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_i2c1>; |
| | | + pinctrl-1 = <&pinctrl_i2c1_gpio>; |
| | | + scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; |
| | | + sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; |
| | | + status = "okay"; |
| | | + |
| | | + pmic@25 { |
| | |
| | | +&iomuxc { |
| | | + pinctrl-names = "default"; |
| | | + |
| | | + pinctrl_wdog: wdoggrp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_leds: ledsgrp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x140 |
| | |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_wdog: wdoggrp { |
| | | + pinctrl_pwm1: pwm1grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6 |
| | | + MX8MP_IOMUXC_GPIO1_IO08__PWM1_OUT 0x116 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_pwm3: pwm3grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_SAI5_RXC__PWM3_OUT 0x116 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_uart1: uart1grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 |
| | | + MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 |
| | | + >; |
| | | + }; |
| | | + |
| | |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_ecspi2: ecspi2grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82 |
| | | + MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82 |
| | | + MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82 |
| | | + MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_i2c1: i2c1grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3 |
| | |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_i2c1_gpio: i2c1grp-gpio { |
| | | + pinctrl_i2c5: i2c5grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x1c3 |
| | | + MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x1c3 |
| | | + MX8MP_IOMUXC_SD1_CMD__I2C5_SDA 0x400001c2 |
| | | + MX8MP_IOMUXC_SD1_CLK__I2C5_SCL 0x400001c2 |
| | | + >; |
| | | + }; |
| | | + |
| | |
| | | +}; |
| | | diff --git a/arch/arm64/configs/igkboard-imx8mp_defconfig b/arch/arm64/configs/igkboard-imx8mp_defconfig |
| | | new file mode 100644 |
| | | index 000000000..6b6fe01d9 |
| | | index 000000000..d6d6206f2 |
| | | --- /dev/null |
| | | +++ b/arch/arm64/configs/igkboard-imx8mp_defconfig |
| | | @@ -0,0 +1,1118 @@ |
| | | @@ -0,0 +1,1129 @@ |
| | | +CONFIG_SYSVIPC=y |
| | | +CONFIG_POSIX_MQUEUE=y |
| | | +CONFIG_AUDIT=y |
| | |
| | | +CONFIG_CGROUP_CPUACCT=y |
| | | +CONFIG_CGROUP_PERF=y |
| | | +CONFIG_CGROUP_BPF=y |
| | | +CONFIG_NAMESPACES=y |
| | | +CONFIG_USER_NS=y |
| | | +CONFIG_SCHED_AUTOGROUP=y |
| | | +CONFIG_RELAY=y |
| | | +CONFIG_BLK_DEV_INITRD=y |
| | | +CONFIG_EXPERT=y |
| | | +CONFIG_KALLSYMS_ALL=y |
| | | +CONFIG_PROFILING=y |
| | | +CONFIG_ARCH_KEEMBAY=y |
| | |
| | | +CONFIG_PINCTRL_IMX8ULP=y |
| | | +CONFIG_PINCTRL_IMX93=y |
| | | +CONFIG_PINCTRL_S32V234=y |
| | | +CONFIG_GPIO_ALTERA=m |
| | | +CONFIG_GPIO_DWAPB=y |
| | | +CONFIG_GPIO_IMX_RPMSG=y |
| | | +CONFIG_GPIO_MB86S7X=y |
| | | +CONFIG_GPIO_MPC8XXX=y |
| | | +CONFIG_GPIO_SYSFS=y |
| | | +CONFIG_GPIO_MXC=y |
| | | +CONFIG_GPIO_PL061=y |
| | | +CONFIG_GPIO_WCD934X=m |
| | | +CONFIG_GPIO_XGENE=y |
| | | +CONFIG_GPIO_MAX732X=y |
| | | +CONFIG_GPIO_PCA953X=y |
| | | +CONFIG_GPIO_PCA953X_IRQ=y |
| | | +CONFIG_GPIO_ADP5585=y |
| | | +CONFIG_GPIO_BD9571MWV=m |
| | | +CONFIG_GPIO_MAX77620=y |
| | | +CONFIG_GPIO_SL28CPLD=m |
| | | +CONFIG_POWER_RESET_BRCMSTB=y |
| | | +CONFIG_POWER_RESET_XGENE=y |
| | | +CONFIG_POWER_RESET_SYSCON=y |
| | |
| | | +CONFIG_RC_DEVICES=y |
| | | +CONFIG_IR_GPIO_CIR=m |
| | | +CONFIG_MEDIA_SUPPORT=y |
| | | +CONFIG_MEDIA_SUPPORT_FILTER=y |
| | | +CONFIG_MEDIA_CAMERA_SUPPORT=y |
| | | +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y |
| | | +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y |
| | |
| | | +CONFIG_BACKLIGHT_PWM=y |
| | | +CONFIG_BACKLIGHT_LP855X=m |
| | | +CONFIG_BACKLIGHT_GPIO=y |
| | | +CONFIG_FRAMEBUFFER_CONSOLE=y |
| | | +CONFIG_LOGO=y |
| | | +# CONFIG_LOGO_LINUX_MONO is not set |
| | | +# CONFIG_LOGO_LINUX_VGA16 is not set |
| | |
| | | +CONFIG_SND_SOC_LPASS_VA_MACRO=m |
| | | +CONFIG_SND_SIMPLE_CARD=y |
| | | +CONFIG_SND_AUDIO_GRAPH_CARD=y |
| | | +CONFIG_HID_A4TECH=y |
| | | +CONFIG_HID_APPLE=y |
| | | +CONFIG_HID_BELKIN=y |
| | | +CONFIG_HID_CHERRY=y |
| | | +CONFIG_HID_CHICONY=y |
| | | +CONFIG_HID_CYPRESS=y |
| | | +CONFIG_HID_EZKEY=y |
| | | +CONFIG_HID_ITE=y |
| | | +CONFIG_HID_KENSINGTON=y |
| | | +CONFIG_HID_LOGITECH=y |
| | | +CONFIG_HID_REDRAGON=y |
| | | +CONFIG_HID_MICROSOFT=y |
| | | +CONFIG_HID_MONTEREY=y |
| | | +CONFIG_HID_MULTITOUCH=m |
| | | +CONFIG_I2C_HID_ACPI=m |
| | | +CONFIG_I2C_HID_OF=m |
| | |
| | | +CONFIG_RTC_DRV_IMX_SC=y |
| | | +CONFIG_RTC_DRV_IMX_RPMSG=y |
| | | +CONFIG_DMADEVICES=y |
| | | +CONFIG_BCM_SBA_RAID=m |
| | | +CONFIG_FSL_EDMA=y |
| | | +CONFIG_FSL_QDMA=m |
| | | +CONFIG_FSL_EDMA_V3=y |
| | |
| | | +CONFIG_EXT2_FS=y |
| | | +CONFIG_EXT3_FS=y |
| | | +CONFIG_EXT4_FS_POSIX_ACL=y |
| | | +CONFIG_BTRFS_FS=m |
| | | +CONFIG_BTRFS_FS_POSIX_ACL=y |
| | | +CONFIG_FANOTIFY=y |
| | | +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y |
| | | +CONFIG_QUOTA=y |
| | |
| | | +CONFIG_CUSE=m |
| | | +CONFIG_OVERLAY_FS=m |
| | | +CONFIG_VFAT_FS=y |
| | | +CONFIG_EXFAT_FS=y |
| | | +CONFIG_NTFS_FS=y |
| | | +CONFIG_NTFS_RW=y |
| | | +CONFIG_NTFS3_FS=y |
| | | +CONFIG_NTFS3_64BIT_CLUSTER=y |
| | | +CONFIG_NTFS3_LZX_XPRESS=y |
| | | +CONFIG_NTFS3_FS_POSIX_ACL=y |
| | | +CONFIG_TMPFS_POSIX_ACL=y |
| | | +CONFIG_HUGETLBFS=y |
| | | +CONFIG_EFIVAR_FS=y |
| | | +CONFIG_JFFS2_FS=y |
| | | +CONFIG_UBIFS_FS=y |
| | | +CONFIG_SQUASHFS=y |
| | | +CONFIG_SQUASHFS_XZ=y |
| | | +CONFIG_NFS_FS=y |
| | | +CONFIG_NFS_V4=y |
| | | +CONFIG_NFS_V4_1=y |
| | |
| | | +CONFIG_ROOT_NFS=y |
| | | +CONFIG_9P_FS=y |
| | | +CONFIG_NLS_CODEPAGE_437=y |
| | | +CONFIG_NLS_CODEPAGE_936=y |
| | | +CONFIG_NLS_CODEPAGE_950=y |
| | | +CONFIG_NLS_CODEPAGE_874=y |
| | | +CONFIG_NLS_ISO8859_1=y |
| | | +CONFIG_NLS_UTF8=y |
| | | +CONFIG_TRUSTED_KEYS=m |
| | | +# CONFIG_TRUSTED_KEYS_TPM is not set |
| | | +# CONFIG_TRUSTED_KEYS_TEE is not set |
| | |
| | | +CONFIG_CRYPTO_CHACHA20POLY1305=m |
| | | +CONFIG_CRYPTO_ECHAINIV=y |
| | | +CONFIG_CRYPTO_TLS=m |
| | | +CONFIG_CRYPTO_BLAKE2B=m |
| | | +CONFIG_CRYPTO_MD4=m |
| | | +CONFIG_CRYPTO_RMD160=m |
| | | +CONFIG_CRYPTO_STREEBOG=m |
| | | +CONFIG_CRYPTO_VMAC=m |
| | | +CONFIG_CRYPTO_WP512=m |
| | | +CONFIG_CRYPTO_XCBC=m |
| | | +CONFIG_CRYPTO_XXHASH=m |
| | | +CONFIG_CRYPTO_LZO=y |
| | | +CONFIG_CRYPTO_ZSTD=y |
| | | +CONFIG_CRYPTO_ANSI_CPRNG=y |
| | | +CONFIG_CRYPTO_USER_API_HASH=m |
| | | +CONFIG_CRYPTO_USER_API_SKCIPHER=m |
| | |
| | | +CONFIG_CRC8=y |
| | | +CONFIG_CMA_SIZE_MBYTES=32 |
| | | +CONFIG_PRINTK_TIME=y |
| | | +CONFIG_DEBUG_KERNEL=y |
| | | +CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y |
| | | +CONFIG_DEBUG_INFO_REDUCED=y |
| | | +CONFIG_MAGIC_SYSRQ=y |