| | |
| | | +dtb-$(CONFIG_ARCH_MXC) += igkboard-imx8mp.dtb |
| | | diff --git a/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts b/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts |
| | | new file mode 100644 |
| | | index 000000000..fa0ecba89 |
| | | index 000000000..b0c36a3c0 |
| | | --- /dev/null |
| | | +++ b/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts |
| | | @@ -0,0 +1,657 @@ |
| | | @@ -0,0 +1,690 @@ |
| | | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| | | +/* |
| | | + * Device Tree Source for LingYun IGKBoard(IoT Gateway Kits Board) - imx8mp |
| | |
| | | + status = "okay"; |
| | | +}; |
| | | + |
| | | +&i2c2 { |
| | | + clock-frequency = <100000>; |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_i2c2>; |
| | | + status = "okay"; |
| | | + |
| | | + rtc1208@6f { |
| | | + compatible = "isil,isl1208"; |
| | | + reg = <0x6f>; |
| | | + status = "okay"; |
| | | + }; |
| | | +}; |
| | | + |
| | | +/*+------------------------+ |
| | | + | CAN/RS485 interface | |
| | | + +------------------------+*/ |
| | |
| | | + pinctrl-names = "default"; |
| | | + pinctrl-0 = <&pinctrl_i2c5>; |
| | | + status = "okay"; |
| | | + |
| | | + hdc1080@40 { |
| | | + compatible = "ti,hdc1080"; |
| | | + reg = <0x40>; |
| | | + status = "okay"; |
| | | + }; |
| | | + |
| | | + eeprom@50 { |
| | | + compatible = "microchip,24c32", "atmel,24c32"; |
| | | + reg = <0x50>; |
| | | + pagesize = <32>; |
| | | + num-addresses = <8>; |
| | | + }; |
| | | +}; |
| | | + |
| | | +/*+------------------------+ |
| | |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_i2c2: i2c2grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 |
| | | + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 |
| | | + >; |
| | | + }; |
| | | + |
| | | + pinctrl_i2c5: i2c5grp { |
| | | + fsl,pins = < |
| | | + MX8MP_IOMUXC_SD1_CMD__I2C5_SDA 0x400001c2 |
| | |
| | | +}; |
| | | diff --git a/arch/arm64/configs/igkboard-imx8mp_defconfig b/arch/arm64/configs/igkboard-imx8mp_defconfig |
| | | new file mode 100644 |
| | | index 000000000..c0bf7a7f4 |
| | | index 000000000..d5bb6e7bf |
| | | --- /dev/null |
| | | +++ b/arch/arm64/configs/igkboard-imx8mp_defconfig |
| | | @@ -0,0 +1,1127 @@ |
| | | @@ -0,0 +1,1108 @@ |
| | | +CONFIG_SYSVIPC=y |
| | | +CONFIG_POSIX_MQUEUE=y |
| | | +CONFIG_AUDIT=y |
| | |
| | | +CONFIG_BLK_DEV_NVME=y |
| | | +CONFIG_SRAM=y |
| | | +CONFIG_PCI_ENDPOINT_TEST=y |
| | | +CONFIG_EEPROM_AT24=m |
| | | +CONFIG_EEPROM_AT25=m |
| | | +CONFIG_EEPROM_AT24=y |
| | | +CONFIG_UACCE=m |
| | | +# CONFIG_SCSI_PROC_FS is not set |
| | | +CONFIG_BLK_DEV_SD=y |
| | |
| | | +CONFIG_EDAC_LAYERSCAPE=m |
| | | +CONFIG_EDAC_SYNOPSYS=y |
| | | +CONFIG_RTC_CLASS=y |
| | | +CONFIG_RTC_DRV_DS1307=m |
| | | +CONFIG_RTC_DRV_HYM8563=m |
| | | +CONFIG_RTC_DRV_MAX77686=y |
| | | +CONFIG_RTC_DRV_RK808=m |
| | | +CONFIG_RTC_DRV_PCF85363=m |
| | | +CONFIG_RTC_DRV_M41T80=m |
| | | +CONFIG_RTC_DRV_RX8581=m |
| | | +CONFIG_RTC_DRV_RV3028=m |
| | | +CONFIG_RTC_DRV_RV8803=m |
| | | +CONFIG_RTC_DRV_S5M=y |
| | | +CONFIG_RTC_DRV_DS3232=y |
| | | +CONFIG_RTC_DRV_PCF2127=m |
| | | +CONFIG_RTC_DRV_PCF2131=m |
| | | +CONFIG_RTC_DRV_EFI=y |
| | | +CONFIG_RTC_DRV_CROS_EC=y |
| | | +CONFIG_RTC_DRV_FSL_FTM_ALARM=m |
| | | +CONFIG_RTC_DRV_PL031=y |
| | | +CONFIG_RTC_DRV_SNVS=y |
| | | +CONFIG_RTC_DRV_BBNSM=y |
| | | +CONFIG_RTC_DRV_IMX_SC=y |
| | | +CONFIG_RTC_DRV_IMX_RPMSG=y |
| | | +CONFIG_RTC_DRV_ISL1208=y |
| | | +CONFIG_DMADEVICES=y |
| | | +CONFIG_FSL_EDMA=y |
| | | +CONFIG_FSL_QDMA=m |
| | |
| | | +CONFIG_QCOM_SPMI_ADC5=m |
| | | +CONFIG_IIO_CROS_EC_SENSORS_CORE=m |
| | | +CONFIG_IIO_CROS_EC_SENSORS=m |
| | | +CONFIG_FXAS21002C=y |
| | | +CONFIG_BMG160=m |
| | | +CONFIG_IIO_ST_GYRO_3AXIS=m |
| | | +CONFIG_MAX30100=m |
| | | +CONFIG_MAX30102=m |
| | | +CONFIG_DHT11=y |
| | | +CONFIG_HDC100X=y |
| | | +CONFIG_HTS221=y |
| | | +CONFIG_FXOS8700_I2C=y |
| | | +CONFIG_RPMSG_IIO_PEDOMETER=m |
| | | +CONFIG_INV_MPU6050_I2C=m |
| | | +CONFIG_IIO_ST_LSM6DSX=y |
| | | +CONFIG_IIO_CROS_EC_LIGHT_PROX=m |
| | | +CONFIG_SENSORS_ISL29018=y |
| | | +CONFIG_VCNL4000=m |
| | | +CONFIG_VCNL4035=m |
| | | +CONFIG_IIO_ST_MAGN_3AXIS=m |
| | | +CONFIG_IIO_CROS_EC_BARO=m |
| | | +CONFIG_MPL3115=y |