From e2a28d845d28f045ea59f8b5d53ff2c8bd21bb16 Mon Sep 17 00:00:00 2001
From: guowenxue <guowenxue@gmail.com>
Date: Wed, 21 Feb 2024 15:43:02 +0800
Subject: [PATCH] Build:IGKBoard-All: Update setup_tools.sh

---
 kernel/patches/igkboard-imx8mp/linux-imx-lf-6.1.36-2.1.0.patch |  103 ++++++++++++++++++++++++++++++++++++++++++++++-----
 1 files changed, 92 insertions(+), 11 deletions(-)

diff --git a/kernel/patches/igkboard-imx8mp/linux-imx-lf-6.1.36-2.1.0.patch b/kernel/patches/igkboard-imx8mp/linux-imx-lf-6.1.36-2.1.0.patch
index 3c0fd17..aa84b67 100644
--- a/kernel/patches/igkboard-imx8mp/linux-imx-lf-6.1.36-2.1.0.patch
+++ b/kernel/patches/igkboard-imx8mp/linux-imx-lf-6.1.36-2.1.0.patch
@@ -10,10 +10,10 @@
 +dtb-$(CONFIG_ARCH_MXC) += igkboard-imx8mp.dtb
 diff --git a/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts b/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts
 new file mode 100644
-index 000000000..c9b644bb0
+index 000000000..7f3e9a74a
 --- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/igkboard-imx8mp.dts
-@@ -0,0 +1,532 @@
+@@ -0,0 +1,613 @@
 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 +/* 
 + * Device Tree Source for LingYun IGKBoard(IoT Gateway Kits Board) - imx8mp
@@ -256,16 +256,69 @@
 +};
 +
 +/*+------------------------+
++  |      Misc Devices      |
++  +------------------------+*/
++
++/* Buzzer */
++&pwm1 {
++    pinctrl-names = "default";
++    pinctrl-0 = <&pinctrl_pwm1>;
++    status = "okay";
++};
++
++/*+------------------------+
++  |   MikroBUS interface   |
++  +------------------------+*/
++
++/* Same as RPi 40Pin extend interface: #32 */
++&pwm3 {
++    pinctrl-names = "default";
++    pinctrl-0 = <&pinctrl_pwm3>;
++    status = "okay";
++};
++
++/* Same as RPi 40Pin extend interface: #19, #21, #23, #24 */
++&uart1 {
++    pinctrl-names = "default";
++    pinctrl-0 = <&pinctrl_uart1>;
++    assigned-clocks = <&clk IMX8MP_CLK_UART1>;
++    assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
++    status = "okay";
++};
++
++/* Same as RPi 40Pin extend interface */
++&ecspi2 {
++    #address-cells = <1>;
++    #size-cells = <0>;
++    fsl,spi-num-chipselects = <1>;
++    pinctrl-names = "default";
++    pinctrl-0 = <&pinctrl_ecspi2>;
++    cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
++    status = "okay";
++
++    spidev@0 {
++        compatible = "fsl,spidev", "semtech,sx1301";
++        reg = <0>;
++        spi-max-frequency = <2000000>;
++    };
++};
++
++/* Same as RPi 40Pin extend interface: #3, #5 */
++&i2c5 {
++    clock-frequency = <100000>;
++    pinctrl-names = "default";
++    pinctrl-0 = <&pinctrl_i2c5>;
++    status = "okay";
++};
++
++/*+------------------------+
 +  |    PCA9450CHN PMIC     |
 +  +------------------------+*/
 +
 +&i2c1 {
 +    clock-frequency = <400000>;
-+    pinctrl-names = "default", "gpio";
++    pinctrl-names = "default";
 +    pinctrl-0 = <&pinctrl_i2c1>;
-+    pinctrl-1 = <&pinctrl_i2c1_gpio>;
-+    scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>;
-+    sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
 +    status = "okay";
 +
 +    pmic@25 {
@@ -367,6 +420,12 @@
 +&iomuxc {
 +    pinctrl-names = "default";
 +
++    pinctrl_wdog: wdoggrp {
++        fsl,pins = <
++            MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B                       0xc6
++        >;
++    };
++
 +    pinctrl_leds: ledsgrp {
 +        fsl,pins = <
 +            MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16                       0x140
@@ -385,9 +444,22 @@
 +        >;
 +    };
 +
-+    pinctrl_wdog: wdoggrp {
++    pinctrl_pwm1: pwm1grp {
 +        fsl,pins = <
-+            MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B                       0xc6
++            MX8MP_IOMUXC_GPIO1_IO08__PWM1_OUT                           0x116
++        >;
++    };
++
++    pinctrl_pwm3: pwm3grp {
++        fsl,pins = <
++            MX8MP_IOMUXC_SAI5_RXC__PWM3_OUT                             0x116
++        >;
++    };
++
++    pinctrl_uart1: uart1grp {
++        fsl,pins = <
++            MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX                        0x140
++            MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX                        0x140
 +        >;
 +    };
 +
@@ -398,6 +470,15 @@
 +        >;
 +    };
 +
++    pinctrl_ecspi2: ecspi2grp {
++        fsl,pins = <
++            MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK                       0x82
++            MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI                       0x82
++            MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO                       0x82
++            MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13                         0x40000
++        >;
++    };
++
 +    pinctrl_i2c1: i2c1grp {
 +        fsl,pins = <
 +            MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL                             0x400001c3
@@ -405,10 +486,10 @@
 +        >;
 +    };
 +
-+    pinctrl_i2c1_gpio: i2c1grp-gpio {
++    pinctrl_i2c5: i2c5grp {
 +        fsl,pins = <
-+            MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14                           0x1c3
-+            MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15                           0x1c3
++            MX8MP_IOMUXC_SD1_CMD__I2C5_SDA                              0x400001c2
++            MX8MP_IOMUXC_SD1_CLK__I2C5_SCL                              0x400001c2
 +        >;
 +    };
 +

--
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